threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
47 lines
1.1 KiB
C
47 lines
1.1 KiB
C
/*
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* Copyright (c) 2017 BayLibre, SAS.
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <linux/clk-provider.h>
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#include <linux/bitfield.h>
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#include <linux/regmap.h>
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#include "gxbb-aoclk.h"
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static int aoclk_gate_regmap_enable(struct clk_hw *hw)
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{
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struct aoclk_gate_regmap *gate = to_aoclk_gate_regmap(hw);
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return regmap_update_bits(gate->regmap, AO_RTI_GEN_CNTL_REG0,
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BIT(gate->bit_idx), BIT(gate->bit_idx));
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}
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static void aoclk_gate_regmap_disable(struct clk_hw *hw)
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{
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struct aoclk_gate_regmap *gate = to_aoclk_gate_regmap(hw);
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regmap_update_bits(gate->regmap, AO_RTI_GEN_CNTL_REG0,
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BIT(gate->bit_idx), 0);
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}
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static int aoclk_gate_regmap_is_enabled(struct clk_hw *hw)
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{
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struct aoclk_gate_regmap *gate = to_aoclk_gate_regmap(hw);
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unsigned int val;
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int ret;
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ret = regmap_read(gate->regmap, AO_RTI_GEN_CNTL_REG0, &val);
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if (ret)
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return ret;
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return (val & BIT(gate->bit_idx)) != 0;
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}
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const struct clk_ops meson_aoclk_gate_regmap_ops = {
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.enable = aoclk_gate_regmap_enable,
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.disable = aoclk_gate_regmap_disable,
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.is_enabled = aoclk_gate_regmap_is_enabled,
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};
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