threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
151 lines
3.6 KiB
ArmAsm
151 lines
3.6 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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/*---------------------------------------------------------------------------+
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| reg_norm.S |
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| Copyright (C) 1992,1993,1994,1995,1997 |
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| W. Metzenthen, 22 Parker St, Ormond, Vic 3163, |
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| Australia. E-mail billm@suburbia.net |
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| Normalize the value in a FPU_REG. |
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| Call from C as: |
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| int FPU_normalize(FPU_REG *n) |
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| int FPU_normalize_nuo(FPU_REG *n) |
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| Return value is the tag of the answer, or-ed with FPU_Exception if |
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| one was raised, or -1 on internal error. |
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+---------------------------------------------------------------------------*/
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#include "fpu_emu.h"
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.text
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ENTRY(FPU_normalize)
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pushl %ebp
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movl %esp,%ebp
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pushl %ebx
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movl PARAM1,%ebx
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movl SIGH(%ebx),%edx
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movl SIGL(%ebx),%eax
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orl %edx,%edx /* ms bits */
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js L_done /* Already normalized */
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jnz L_shift_1 /* Shift left 1 - 31 bits */
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orl %eax,%eax
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jz L_zero /* The contents are zero */
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movl %eax,%edx
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xorl %eax,%eax
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subw $32,EXP(%ebx) /* This can cause an underflow */
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/* We need to shift left by 1 - 31 bits */
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L_shift_1:
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bsrl %edx,%ecx /* get the required shift in %ecx */
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subl $31,%ecx
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negl %ecx
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shld %cl,%eax,%edx
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shl %cl,%eax
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subw %cx,EXP(%ebx) /* This can cause an underflow */
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movl %edx,SIGH(%ebx)
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movl %eax,SIGL(%ebx)
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L_done:
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cmpw EXP_OVER,EXP(%ebx)
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jge L_overflow
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cmpw EXP_UNDER,EXP(%ebx)
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jle L_underflow
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L_exit_valid:
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movl TAG_Valid,%eax
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/* Convert the exponent to 80x87 form. */
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addw EXTENDED_Ebias,EXP(%ebx)
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andw $0x7fff,EXP(%ebx)
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L_exit:
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popl %ebx
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leave
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ret
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L_zero:
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movw $0,EXP(%ebx)
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movl TAG_Zero,%eax
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jmp L_exit
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L_underflow:
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/* Convert the exponent to 80x87 form. */
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addw EXTENDED_Ebias,EXP(%ebx)
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push %ebx
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call arith_underflow
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pop %ebx
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jmp L_exit
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L_overflow:
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/* Convert the exponent to 80x87 form. */
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addw EXTENDED_Ebias,EXP(%ebx)
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push %ebx
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call arith_overflow
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pop %ebx
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jmp L_exit
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ENDPROC(FPU_normalize)
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/* Normalise without reporting underflow or overflow */
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ENTRY(FPU_normalize_nuo)
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pushl %ebp
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movl %esp,%ebp
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pushl %ebx
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movl PARAM1,%ebx
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movl SIGH(%ebx),%edx
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movl SIGL(%ebx),%eax
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orl %edx,%edx /* ms bits */
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js L_exit_nuo_valid /* Already normalized */
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jnz L_nuo_shift_1 /* Shift left 1 - 31 bits */
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orl %eax,%eax
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jz L_exit_nuo_zero /* The contents are zero */
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movl %eax,%edx
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xorl %eax,%eax
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subw $32,EXP(%ebx) /* This can cause an underflow */
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/* We need to shift left by 1 - 31 bits */
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L_nuo_shift_1:
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bsrl %edx,%ecx /* get the required shift in %ecx */
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subl $31,%ecx
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negl %ecx
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shld %cl,%eax,%edx
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shl %cl,%eax
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subw %cx,EXP(%ebx) /* This can cause an underflow */
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movl %edx,SIGH(%ebx)
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movl %eax,SIGL(%ebx)
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L_exit_nuo_valid:
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movl TAG_Valid,%eax
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popl %ebx
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leave
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ret
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L_exit_nuo_zero:
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movl TAG_Zero,%eax
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movw EXP_UNDER,EXP(%ebx)
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popl %ebx
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leave
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ret
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ENDPROC(FPU_normalize_nuo)
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