threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
31 lines
1.1 KiB
C
31 lines
1.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_SERIAL_H
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#define _ASM_X86_SERIAL_H
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/*
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* This assumes you have a 1.8432 MHz clock for your UART.
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*
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* It'd be nice if someone built a serial card with a 24.576 MHz
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* clock, since the 16550A is capable of handling a top speed of 1.5
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* megabits/second; but this requires a faster clock.
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*/
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#define BASE_BAUD (1843200/16)
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/* Standard COM flags (except for COM4, because of the 8514 problem) */
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#ifdef CONFIG_SERIAL_8250_DETECT_IRQ
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# define STD_COMX_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ)
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# define STD_COM4_FLAGS (UPF_BOOT_AUTOCONF | 0 | UPF_AUTO_IRQ)
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#else
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# define STD_COMX_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | 0 )
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# define STD_COM4_FLAGS (UPF_BOOT_AUTOCONF | 0 | 0 )
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#endif
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#define SERIAL_PORT_DFNS \
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/* UART CLK PORT IRQ FLAGS */ \
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{ .uart = 0, BASE_BAUD, 0x3F8, 4, STD_COMX_FLAGS }, /* ttyS0 */ \
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{ .uart = 0, BASE_BAUD, 0x2F8, 3, STD_COMX_FLAGS }, /* ttyS1 */ \
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{ .uart = 0, BASE_BAUD, 0x3E8, 4, STD_COMX_FLAGS }, /* ttyS2 */ \
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{ .uart = 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */
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#endif /* _ASM_X86_SERIAL_H */
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