threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
139 lines
3.5 KiB
ArmAsm
139 lines
3.5 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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/* NGpage.S: Niagara optimize clear and copy page.
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*
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* Copyright (C) 2006 (davem@davemloft.net)
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*/
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#include <asm/asi.h>
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#include <asm/page.h>
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.text
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.align 32
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/* This is heavily simplified from the sun4u variants
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* because Niagara does not have any D-cache aliasing issues
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* and also we don't need to use the FPU in order to implement
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* an optimal page copy/clear.
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*/
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NGcopy_user_page: /* %o0=dest, %o1=src, %o2=vaddr */
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save %sp, -192, %sp
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rd %asi, %g3
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wr %g0, ASI_BLK_INIT_QUAD_LDD_P, %asi
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set PAGE_SIZE, %g7
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prefetch [%i1 + 0x00], #one_read
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prefetch [%i1 + 0x40], #one_read
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1: prefetch [%i1 + 0x80], #one_read
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prefetch [%i1 + 0xc0], #one_read
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ldda [%i1 + 0x00] %asi, %o2
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ldda [%i1 + 0x10] %asi, %o4
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ldda [%i1 + 0x20] %asi, %l2
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ldda [%i1 + 0x30] %asi, %l4
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stxa %o2, [%i0 + 0x00] %asi
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stxa %o3, [%i0 + 0x08] %asi
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stxa %o4, [%i0 + 0x10] %asi
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stxa %o5, [%i0 + 0x18] %asi
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stxa %l2, [%i0 + 0x20] %asi
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stxa %l3, [%i0 + 0x28] %asi
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stxa %l4, [%i0 + 0x30] %asi
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stxa %l5, [%i0 + 0x38] %asi
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ldda [%i1 + 0x40] %asi, %o2
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ldda [%i1 + 0x50] %asi, %o4
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ldda [%i1 + 0x60] %asi, %l2
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ldda [%i1 + 0x70] %asi, %l4
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stxa %o2, [%i0 + 0x40] %asi
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stxa %o3, [%i0 + 0x48] %asi
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stxa %o4, [%i0 + 0x50] %asi
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stxa %o5, [%i0 + 0x58] %asi
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stxa %l2, [%i0 + 0x60] %asi
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stxa %l3, [%i0 + 0x68] %asi
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stxa %l4, [%i0 + 0x70] %asi
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stxa %l5, [%i0 + 0x78] %asi
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add %i1, 128, %i1
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subcc %g7, 128, %g7
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bne,pt %xcc, 1b
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add %i0, 128, %i0
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wr %g3, 0x0, %asi
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membar #Sync
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ret
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restore
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.align 32
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.globl NGclear_page
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.globl NGclear_user_page
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NGclear_page: /* %o0=dest */
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NGclear_user_page: /* %o0=dest, %o1=vaddr */
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rd %asi, %g3
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wr %g0, ASI_BLK_INIT_QUAD_LDD_P, %asi
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set PAGE_SIZE, %g7
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1: stxa %g0, [%o0 + 0x00] %asi
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stxa %g0, [%o0 + 0x08] %asi
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stxa %g0, [%o0 + 0x10] %asi
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stxa %g0, [%o0 + 0x18] %asi
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stxa %g0, [%o0 + 0x20] %asi
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stxa %g0, [%o0 + 0x28] %asi
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stxa %g0, [%o0 + 0x30] %asi
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stxa %g0, [%o0 + 0x38] %asi
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stxa %g0, [%o0 + 0x40] %asi
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stxa %g0, [%o0 + 0x48] %asi
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stxa %g0, [%o0 + 0x50] %asi
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stxa %g0, [%o0 + 0x58] %asi
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stxa %g0, [%o0 + 0x60] %asi
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stxa %g0, [%o0 + 0x68] %asi
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stxa %g0, [%o0 + 0x70] %asi
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stxa %g0, [%o0 + 0x78] %asi
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stxa %g0, [%o0 + 0x80] %asi
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stxa %g0, [%o0 + 0x88] %asi
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stxa %g0, [%o0 + 0x90] %asi
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stxa %g0, [%o0 + 0x98] %asi
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stxa %g0, [%o0 + 0xa0] %asi
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stxa %g0, [%o0 + 0xa8] %asi
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stxa %g0, [%o0 + 0xb0] %asi
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stxa %g0, [%o0 + 0xb8] %asi
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stxa %g0, [%o0 + 0xc0] %asi
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stxa %g0, [%o0 + 0xc8] %asi
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stxa %g0, [%o0 + 0xd0] %asi
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stxa %g0, [%o0 + 0xd8] %asi
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stxa %g0, [%o0 + 0xe0] %asi
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stxa %g0, [%o0 + 0xe8] %asi
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stxa %g0, [%o0 + 0xf0] %asi
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stxa %g0, [%o0 + 0xf8] %asi
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subcc %g7, 256, %g7
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bne,pt %xcc, 1b
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add %o0, 256, %o0
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wr %g3, 0x0, %asi
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membar #Sync
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retl
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nop
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#define BRANCH_ALWAYS 0x10680000
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#define NOP 0x01000000
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#define NG_DO_PATCH(OLD, NEW) \
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sethi %hi(NEW), %g1; \
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or %g1, %lo(NEW), %g1; \
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sethi %hi(OLD), %g2; \
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or %g2, %lo(OLD), %g2; \
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sub %g1, %g2, %g1; \
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sethi %hi(BRANCH_ALWAYS), %g3; \
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sll %g1, 11, %g1; \
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srl %g1, 11 + 2, %g1; \
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or %g3, %lo(BRANCH_ALWAYS), %g3; \
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or %g3, %g1, %g3; \
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stw %g3, [%g2]; \
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sethi %hi(NOP), %g3; \
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or %g3, %lo(NOP), %g3; \
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stw %g3, [%g2 + 0x4]; \
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flush %g2;
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.globl niagara_patch_pageops
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.type niagara_patch_pageops,#function
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niagara_patch_pageops:
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NG_DO_PATCH(copy_user_page, NGcopy_user_page)
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NG_DO_PATCH(_clear_page, NGclear_page)
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NG_DO_PATCH(clear_user_page, NGclear_user_page)
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retl
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nop
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.size niagara_patch_pageops,.-niagara_patch_pageops
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