threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
90 lines
2.2 KiB
C
90 lines
2.2 KiB
C
/*
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* Copyright (C) 2015 Imagination Technologies
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* Author: Alex Smith <alex.smith@imgtec.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <asm/sgidefs.h>
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#if _MIPS_SIM != _MIPS_SIM_ABI64 && defined(CONFIG_64BIT)
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/* Building 32-bit VDSO for the 64-bit kernel. Fake a 32-bit Kconfig. */
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#undef CONFIG_64BIT
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#define CONFIG_32BIT 1
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#ifndef __ASSEMBLY__
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#include <asm-generic/atomic64.h>
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#endif
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#endif
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#ifndef __ASSEMBLY__
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#include <asm/asm.h>
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#include <asm/page.h>
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#include <asm/vdso.h>
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static inline unsigned long get_vdso_base(void)
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{
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unsigned long addr;
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/*
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* We can't use cpu_has_mips_r6 since it needs the cpu_data[]
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* kernel symbol.
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*/
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#ifdef CONFIG_CPU_MIPSR6
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/*
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* lapc <symbol> is an alias to addiupc reg, <symbol> - .
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*
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* We can't use addiupc because there is no label-label
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* support for the addiupc reloc
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*/
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__asm__("lapc %0, _start \n"
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: "=r" (addr) : :);
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#else
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/*
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* Get the base load address of the VDSO. We have to avoid generating
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* relocations and references to the GOT because ld.so does not peform
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* relocations on the VDSO. We use the current offset from the VDSO base
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* and perform a PC-relative branch which gives the absolute address in
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* ra, and take the difference. The assembler chokes on
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* "li %0, _start - .", so embed the offset as a word and branch over
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* it.
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*
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*/
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__asm__(
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" .set push \n"
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" .set noreorder \n"
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" bal 1f \n"
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" nop \n"
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" .word _start - . \n"
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"1: lw %0, 0($31) \n"
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" " STR(PTR_ADDU) " %0, $31, %0 \n"
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" .set pop \n"
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: "=r" (addr)
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:
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: "$31");
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#endif /* CONFIG_CPU_MIPSR6 */
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return addr;
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}
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static inline const union mips_vdso_data *get_vdso_data(void)
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{
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return (const union mips_vdso_data *)(get_vdso_base() - PAGE_SIZE);
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}
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#ifdef CONFIG_CLKSRC_MIPS_GIC
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static inline void __iomem *get_gic(const union mips_vdso_data *data)
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{
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return (void __iomem *)((unsigned long)data & PAGE_MASK) - PAGE_SIZE;
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}
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#endif /* CONFIG_CLKSRC_MIPS_GIC */
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#endif /* __ASSEMBLY__ */
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