threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
58 lines
1.6 KiB
C
58 lines
1.6 KiB
C
/*
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* Copyright (C) 2000,2001,2004 Broadcom Corporation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/clocksource.h>
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#include <linux/sched_clock.h>
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#include <asm/addrspace.h>
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#include <asm/io.h>
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#include <asm/time.h>
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#include <asm/sibyte/bcm1480_regs.h>
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#include <asm/sibyte/sb1250_regs.h>
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#include <asm/sibyte/bcm1480_int.h>
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#include <asm/sibyte/bcm1480_scd.h>
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#include <asm/sibyte/sb1250.h>
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static u64 bcm1480_hpt_read(struct clocksource *cs)
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{
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return (u64) __raw_readq(IOADDR(A_SCD_ZBBUS_CYCLE_COUNT));
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}
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struct clocksource bcm1480_clocksource = {
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.name = "zbbus-cycles",
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.rating = 200,
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.read = bcm1480_hpt_read,
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.mask = CLOCKSOURCE_MASK(64),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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static u64 notrace sb1480_read_sched_clock(void)
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{
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return __raw_readq(IOADDR(A_SCD_ZBBUS_CYCLE_COUNT));
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}
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void __init sb1480_clocksource_init(void)
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{
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struct clocksource *cs = &bcm1480_clocksource;
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unsigned int plldiv;
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unsigned long zbbus;
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plldiv = G_BCM1480_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG)));
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zbbus = ((plldiv >> 1) * 50000000) + ((plldiv & 1) * 25000000);
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clocksource_register_hz(cs, zbbus);
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sched_clock_register(sb1480_read_sched_clock, 64, zbbus);
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}
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