threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
68 lines
2.2 KiB
C
68 lines
2.2 KiB
C
/*
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* Atheros AR933X UART defines
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*
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* Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#ifndef __AR933X_UART_H
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#define __AR933X_UART_H
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#define AR933X_UART_REGS_SIZE 20
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#define AR933X_UART_FIFO_SIZE 16
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#define AR933X_UART_DATA_REG 0x00
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#define AR933X_UART_CS_REG 0x04
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#define AR933X_UART_CLOCK_REG 0x08
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#define AR933X_UART_INT_REG 0x0c
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#define AR933X_UART_INT_EN_REG 0x10
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#define AR933X_UART_DATA_TX_RX_MASK 0xff
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#define AR933X_UART_DATA_RX_CSR BIT(8)
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#define AR933X_UART_DATA_TX_CSR BIT(9)
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#define AR933X_UART_CS_PARITY_S 0
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#define AR933X_UART_CS_PARITY_M 0x3
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#define AR933X_UART_CS_PARITY_NONE 0
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#define AR933X_UART_CS_PARITY_ODD 2
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#define AR933X_UART_CS_PARITY_EVEN 3
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#define AR933X_UART_CS_IF_MODE_S 2
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#define AR933X_UART_CS_IF_MODE_M 0x3
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#define AR933X_UART_CS_IF_MODE_NONE 0
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#define AR933X_UART_CS_IF_MODE_DTE 1
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#define AR933X_UART_CS_IF_MODE_DCE 2
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#define AR933X_UART_CS_FLOW_CTRL_S 4
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#define AR933X_UART_CS_FLOW_CTRL_M 0x3
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#define AR933X_UART_CS_DMA_EN BIT(6)
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#define AR933X_UART_CS_TX_READY_ORIDE BIT(7)
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#define AR933X_UART_CS_RX_READY_ORIDE BIT(8)
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#define AR933X_UART_CS_TX_READY BIT(9)
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#define AR933X_UART_CS_RX_BREAK BIT(10)
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#define AR933X_UART_CS_TX_BREAK BIT(11)
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#define AR933X_UART_CS_HOST_INT BIT(12)
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#define AR933X_UART_CS_HOST_INT_EN BIT(13)
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#define AR933X_UART_CS_TX_BUSY BIT(14)
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#define AR933X_UART_CS_RX_BUSY BIT(15)
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#define AR933X_UART_CLOCK_STEP_M 0xffff
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#define AR933X_UART_CLOCK_SCALE_M 0xfff
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#define AR933X_UART_CLOCK_SCALE_S 16
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#define AR933X_UART_CLOCK_STEP_M 0xffff
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#define AR933X_UART_INT_RX_VALID BIT(0)
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#define AR933X_UART_INT_TX_READY BIT(1)
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#define AR933X_UART_INT_RX_FRAMING_ERR BIT(2)
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#define AR933X_UART_INT_RX_OFLOW_ERR BIT(3)
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#define AR933X_UART_INT_TX_OFLOW_ERR BIT(4)
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#define AR933X_UART_INT_RX_PARITY_ERR BIT(5)
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#define AR933X_UART_INT_RX_BREAK_ON BIT(6)
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#define AR933X_UART_INT_RX_BREAK_OFF BIT(7)
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#define AR933X_UART_INT_RX_FULL BIT(8)
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#define AR933X_UART_INT_TX_EMPTY BIT(9)
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#define AR933X_UART_INT_ALLINTS 0x3ff
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#endif /* __AR933X_UART_H */
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