threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
55 lines
1.4 KiB
C
55 lines
1.4 KiB
C
/*
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* Cobalt time initialization.
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*
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* Copyright (C) 2007 Yoichi Yuasa <yuasa@linux-mips.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/i8253.h>
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#include <linux/init.h>
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#include <asm/gt64120.h>
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#include <asm/time.h>
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#define GT641XX_BASE_CLOCK 50000000 /* 50MHz */
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void __init plat_time_init(void)
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{
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u32 start, end;
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int i = HZ / 10;
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setup_pit_timer();
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gt641xx_set_base_clock(GT641XX_BASE_CLOCK);
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/*
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* MIPS counter frequency is measured during a 100msec interval
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* using GT64111 timer0.
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*/
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while (!gt641xx_timer0_state())
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;
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start = read_c0_count();
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while (i--)
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while (!gt641xx_timer0_state())
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;
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end = read_c0_count();
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mips_hpt_frequency = (end - start) * 10;
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printk(KERN_INFO "MIPS counter frequency %dHz\n", mips_hpt_frequency);
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}
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