threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
65 lines
1.4 KiB
C
65 lines
1.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* 16550 compatible uart based serial debug support for zboot
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*/
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#include <linux/types.h>
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#include <linux/serial_reg.h>
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#include <asm/addrspace.h>
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#if defined(CONFIG_MACH_LOONGSON64) || defined(CONFIG_MIPS_MALTA)
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#define UART_BASE 0x1fd003f8
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#define PORT(offset) (CKSEG1ADDR(UART_BASE) + (offset))
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#endif
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#ifdef CONFIG_AR7
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#include <ar7.h>
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#define PORT(offset) (CKSEG1ADDR(AR7_REGS_UART0) + (4 * offset))
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#endif
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#if defined(CONFIG_MACH_JZ4740) || defined(CONFIG_MACH_JZ4780)
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#include <asm/mach-jz4740/base.h>
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#define PORT(offset) (CKSEG1ADDR(JZ4740_UART0_BASE_ADDR) + (4 * offset))
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#endif
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#ifdef CONFIG_CPU_XLR
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#define UART0_BASE 0x1EF14000
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#define PORT(offset) (CKSEG1ADDR(UART0_BASE) + (4 * offset))
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#define IOTYPE unsigned int
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#endif
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#ifdef CONFIG_CPU_XLP
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#define UART0_BASE 0x18030100
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#define PORT(offset) (CKSEG1ADDR(UART0_BASE) + (4 * offset))
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#define IOTYPE unsigned int
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#endif
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#ifndef IOTYPE
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#define IOTYPE char
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#endif
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#ifndef PORT
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#error please define the serial port address for your own machine
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#endif
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static inline unsigned int serial_in(int offset)
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{
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return *((volatile IOTYPE *)PORT(offset)) & 0xFF;
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}
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static inline void serial_out(int offset, int value)
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{
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*((volatile IOTYPE *)PORT(offset)) = value & 0xFF;
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}
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void putc(char c)
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{
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int timeout = 1000000;
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while (((serial_in(UART_LSR) & UART_LSR_THRE) == 0) && (timeout-- > 0))
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;
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serial_out(UART_TX, c);
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}
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