threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
44 lines
1.3 KiB
C
44 lines
1.3 KiB
C
/*
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* Carsten Langgaard, carstenl@mips.com
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* Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License (Version 2) as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
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*
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* Setting up the clock on the MIPS boards.
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*/
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#include <linux/init.h>
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#include <linux/time.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <asm/time.h>
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#include <asm/mach-ar7/ar7.h>
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void __init plat_time_init(void)
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{
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struct clk *cpu_clk;
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/* Initialize ar7 clocks so the CPU clock frequency is correct */
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ar7_init_clocks();
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cpu_clk = clk_get(NULL, "cpu");
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if (IS_ERR(cpu_clk)) {
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printk(KERN_ERR "unable to get cpu clock\n");
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return;
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}
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mips_hpt_frequency = clk_get_rate(cpu_clk) / 2;
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}
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