threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
123 lines
2.6 KiB
C
123 lines
2.6 KiB
C
/*
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* Copyright (C) 2006 Atmark Techno, Inc.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#ifndef _ASM_MICROBLAZE_IRQFLAGS_H
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#define _ASM_MICROBLAZE_IRQFLAGS_H
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#include <linux/types.h>
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#include <asm/registers.h>
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#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
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static inline notrace unsigned long arch_local_irq_save(void)
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{
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unsigned long flags;
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asm volatile(" msrclr %0, %1 \n"
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" nop \n"
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: "=r"(flags)
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: "i"(MSR_IE)
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: "memory");
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return flags;
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}
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static inline notrace void arch_local_irq_disable(void)
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{
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/* this uses r0 without declaring it - is that correct? */
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asm volatile(" msrclr r0, %0 \n"
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" nop \n"
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:
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: "i"(MSR_IE)
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: "memory");
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}
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static inline notrace void arch_local_irq_enable(void)
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{
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/* this uses r0 without declaring it - is that correct? */
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asm volatile(" msrset r0, %0 \n"
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" nop \n"
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:
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: "i"(MSR_IE)
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: "memory");
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}
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#else /* !CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR */
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static inline notrace unsigned long arch_local_irq_save(void)
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{
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unsigned long flags, tmp;
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asm volatile (" mfs %0, rmsr \n"
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" nop \n"
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" andi %1, %0, %2 \n"
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" mts rmsr, %1 \n"
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" nop \n"
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: "=r"(flags), "=r"(tmp)
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: "i"(~MSR_IE)
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: "memory");
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return flags;
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}
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static inline notrace void arch_local_irq_disable(void)
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{
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unsigned long tmp;
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asm volatile(" mfs %0, rmsr \n"
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" nop \n"
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" andi %0, %0, %1 \n"
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" mts rmsr, %0 \n"
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" nop \n"
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: "=r"(tmp)
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: "i"(~MSR_IE)
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: "memory");
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}
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static inline notrace void arch_local_irq_enable(void)
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{
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unsigned long tmp;
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asm volatile(" mfs %0, rmsr \n"
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" nop \n"
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" ori %0, %0, %1 \n"
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" mts rmsr, %0 \n"
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" nop \n"
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: "=r"(tmp)
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: "i"(MSR_IE)
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: "memory");
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}
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#endif /* CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR */
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static inline notrace unsigned long arch_local_save_flags(void)
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{
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unsigned long flags;
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asm volatile(" mfs %0, rmsr \n"
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" nop \n"
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: "=r"(flags)
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:
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: "memory");
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return flags;
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}
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static inline notrace void arch_local_irq_restore(unsigned long flags)
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{
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asm volatile(" mts rmsr, %0 \n"
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" nop \n"
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:
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: "r"(flags)
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: "memory");
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}
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static inline notrace bool arch_irqs_disabled_flags(unsigned long flags)
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{
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return (flags & MSR_IE) == 0;
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}
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static inline notrace bool arch_irqs_disabled(void)
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{
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return arch_irqs_disabled_flags(arch_local_save_flags());
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}
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#endif /* _ASM_MICROBLAZE_IRQFLAGS_H */
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