threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
52 lines
1.0 KiB
C
52 lines
1.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* mcfclk.h -- coldfire specific clock structure
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*/
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#ifndef mcfclk_h
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#define mcfclk_h
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struct clk;
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struct clk_ops {
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void (*enable)(struct clk *);
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void (*disable)(struct clk *);
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};
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struct clk {
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const char *name;
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struct clk_ops *clk_ops;
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unsigned long rate;
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unsigned long enabled;
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u8 slot;
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};
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extern struct clk *mcf_clks[];
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#ifdef MCFPM_PPMCR0
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extern struct clk_ops clk_ops0;
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#ifdef MCFPM_PPMCR1
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extern struct clk_ops clk_ops1;
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#endif /* MCFPM_PPMCR1 */
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#define DEFINE_CLK(clk_bank, clk_name, clk_slot, clk_rate) \
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static struct clk __clk_##clk_bank##_##clk_slot = { \
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.name = clk_name, \
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.clk_ops = &clk_ops##clk_bank, \
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.rate = clk_rate, \
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.slot = clk_slot, \
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}
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void __clk_init_enabled(struct clk *);
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void __clk_init_disabled(struct clk *);
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#else
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#define DEFINE_CLK(clk_ref, clk_name, clk_rate) \
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static struct clk clk_##clk_ref = { \
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.name = clk_name, \
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.rate = clk_rate, \
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}
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#endif /* MCFPM_PPMCR0 */
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#endif /* mcfclk_h */
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