threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
57 lines
1.3 KiB
C
57 lines
1.3 KiB
C
/*
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* Copyright 2005-2010 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#ifndef _MACH_PLL_H
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#define _MACH_PLL_H
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#ifndef __ASSEMBLY__
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#ifdef CONFIG_SMP
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#include <asm/blackfin.h>
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#include <asm/irqflags.h>
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#include <mach/irq.h>
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#define SUPPLE_0_WAKEUP ((IRQ_SUPPLE_0 - (IRQ_CORETMR + 1)) % 32)
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#define SUPPLE_1_WAKEUP ((IRQ_SUPPLE_1 - (IRQ_CORETMR + 1)) % 32)
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static inline void
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bfin_iwr_restore(unsigned long iwr0, unsigned long iwr1, unsigned long iwr2)
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{
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unsigned long SICA_SICB_OFF = ((bfin_read_DSPID() & 0xff) ? 0x1000 : 0);
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bfin_write32(SIC_IWR0 + SICA_SICB_OFF, iwr0);
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bfin_write32(SIC_IWR1 + SICA_SICB_OFF, iwr1);
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}
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#define bfin_iwr_restore bfin_iwr_restore
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static inline void
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bfin_iwr_save(unsigned long niwr0, unsigned long niwr1, unsigned long niwr2,
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unsigned long *iwr0, unsigned long *iwr1, unsigned long *iwr2)
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{
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unsigned long SICA_SICB_OFF = ((bfin_read_DSPID() & 0xff) ? 0x1000 : 0);
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*iwr0 = bfin_read32(SIC_IWR0 + SICA_SICB_OFF);
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*iwr1 = bfin_read32(SIC_IWR1 + SICA_SICB_OFF);
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bfin_iwr_restore(niwr0, niwr1, niwr2);
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}
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#define bfin_iwr_save bfin_iwr_save
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static inline void
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bfin_iwr_set_sup0(unsigned long *iwr0, unsigned long *iwr1, unsigned long *iwr2)
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{
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bfin_iwr_save(0, IWR_ENABLE(SUPPLE_0_WAKEUP) |
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IWR_ENABLE(SUPPLE_1_WAKEUP), 0, iwr0, iwr1, iwr2);
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}
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#endif
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#endif
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#include <mach-common/pll.h>
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#endif
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