threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
55 lines
1.3 KiB
C
55 lines
1.3 KiB
C
/*
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* Copyright 2007-2009 Analog Devices Inc.
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* Philippe Gerum <rpm@xenomai.org>
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*
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* Licensed under the GPL-2 or later.
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*/
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#ifndef __ASM_BLACKFIN_SMP_H
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#define __ASM_BLACKFIN_SMP_H
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#include <linux/kernel.h>
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#include <linux/threads.h>
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#include <linux/cpumask.h>
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#include <linux/cache.h>
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#include <asm/blackfin.h>
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#include <mach/smp.h>
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#define raw_smp_processor_id() blackfin_core_id()
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extern void bfin_relocate_coreb_l1_mem(void);
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extern void arch_send_call_function_single_ipi(int cpu);
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extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
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#if defined(CONFIG_SMP) && defined(CONFIG_ICACHE_FLUSH_L1)
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asmlinkage void blackfin_icache_flush_range_l1(unsigned long *ptr);
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extern unsigned long blackfin_iflush_l1_entry[NR_CPUS];
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#endif
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struct corelock_slot {
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int lock;
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};
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extern struct corelock_slot corelock;
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#ifdef __ARCH_SYNC_CORE_ICACHE
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extern unsigned long icache_invld_count[NR_CPUS];
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#endif
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#ifdef __ARCH_SYNC_CORE_DCACHE
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extern unsigned long dcache_invld_count[NR_CPUS];
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#endif
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void smp_icache_flush_range_others(unsigned long start,
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unsigned long end);
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#ifdef CONFIG_HOTPLUG_CPU
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void coreb_die(void);
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void cpu_die(void);
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void platform_cpu_die(void);
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int __cpu_disable(void);
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int __cpu_die(unsigned int cpu);
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#endif
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void smp_timer_broadcast(const struct cpumask *mask);
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#endif /* !__ASM_BLACKFIN_SMP_H */
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