threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
56 lines
1.2 KiB
Devicetree
56 lines
1.2 KiB
Devicetree
// SPDX-License-Identifier: GPL-2.0
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/*
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* DTS file for AMD Seattle Clocks
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*
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* Copyright (C) 2014 Advanced Micro Devices, Inc.
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*/
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adl3clk_100mhz: clk100mhz_0 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <100000000>;
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clock-output-names = "adl3clk_100mhz";
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};
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ccpclk_375mhz: clk375mhz {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <375000000>;
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clock-output-names = "ccpclk_375mhz";
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};
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sataclk_333mhz: clk333mhz {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <333000000>;
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clock-output-names = "sataclk_333mhz";
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};
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pcieclk_500mhz: clk500mhz_0 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <500000000>;
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clock-output-names = "pcieclk_500mhz";
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};
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dmaclk_500mhz: clk500mhz_1 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <500000000>;
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clock-output-names = "dmaclk_500mhz";
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};
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miscclk_250mhz: clk250mhz_4 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <250000000>;
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clock-output-names = "miscclk_250mhz";
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};
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uartspiclk_100mhz: clk100mhz_1 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <100000000>;
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clock-output-names = "uartspiclk_100mhz";
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};
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