threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
53 lines
2.2 KiB
C
53 lines
2.2 KiB
C
/*
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* AM33XX PRM_XXX register bits
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*
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* Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_33XX_H
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#define __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_33XX_H
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#include "prm.h"
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#define AM33XX_GFX_MEM_ONSTATE_MASK (0x3 << 17)
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#define AM33XX_GFX_MEM_RETSTATE_MASK (1 << 6)
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#define AM33XX_GFX_MEM_STATEST_MASK (0x3 << 4)
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#define AM33XX_GLOBAL_WARM_SW_RST_MASK (1 << 1)
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#define AM33XX_RST_GLOBAL_WARM_SW_MASK (1 << 0)
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#define AM33XX_PRUSS_MEM_ONSTATE_MASK (0x3 << 5)
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#define AM33XX_PRUSS_MEM_RETSTATE_MASK (1 << 7)
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#define AM33XX_PRUSS_MEM_STATEST_MASK (0x3 << 23)
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#define AM33XX_LASTPOWERSTATEENTERED_SHIFT 24
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#define AM33XX_LASTPOWERSTATEENTERED_MASK (0x3 << 24)
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#define AM33XX_LOGICRETSTATE_MASK (1 << 2)
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#define AM33XX_LOGICRETSTATE_3_3_MASK (1 << 3)
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#define AM33XX_LOGICSTATEST_SHIFT 2
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#define AM33XX_LOGICSTATEST_MASK (1 << 2)
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#define AM33XX_LOWPOWERSTATECHANGE_SHIFT 4
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#define AM33XX_LOWPOWERSTATECHANGE_MASK (1 << 4)
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#define AM33XX_MPU_L1_ONSTATE_MASK (0x3 << 18)
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#define AM33XX_MPU_L1_RETSTATE_MASK (1 << 22)
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#define AM33XX_MPU_L1_STATEST_MASK (0x3 << 6)
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#define AM33XX_MPU_L2_ONSTATE_MASK (0x3 << 20)
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#define AM33XX_MPU_L2_RETSTATE_MASK (1 << 23)
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#define AM33XX_MPU_L2_STATEST_MASK (0x3 << 8)
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#define AM33XX_MPU_RAM_ONSTATE_MASK (0x3 << 16)
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#define AM33XX_MPU_RAM_RETSTATE_MASK (1 << 24)
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#define AM33XX_MPU_RAM_STATEST_MASK (0x3 << 4)
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#define AM33XX_PER_MEM_ONSTATE_MASK (0x3 << 25)
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#define AM33XX_PER_MEM_RETSTATE_MASK (1 << 29)
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#define AM33XX_PER_MEM_STATEST_MASK (0x3 << 17)
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#define AM33XX_RAM_MEM_ONSTATE_MASK (0x3 << 30)
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#define AM33XX_RAM_MEM_RETSTATE_MASK (1 << 27)
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#define AM33XX_RAM_MEM_STATEST_MASK (0x3 << 21)
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#endif
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