threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
112 lines
2.7 KiB
C
112 lines
2.7 KiB
C
/*
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* linux/arch/arm/plat-omap/ocpi.c
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*
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* Minimal OCP bus support for omap16xx
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*
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* Copyright (C) 2003 - 2005 Nokia Corporation
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* Copyright (C) 2012 Texas Instruments, Inc.
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* Written by Tony Lindgren <tony@atomide.com>
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*
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* Modified for clock framework by Paul Mundt <paul.mundt@nokia.com>.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/spinlock.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include "common.h"
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#define OCPI_BASE 0xfffec320
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#define OCPI_FAULT (OCPI_BASE + 0x00)
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#define OCPI_CMD_FAULT (OCPI_BASE + 0x04)
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#define OCPI_SINT0 (OCPI_BASE + 0x08)
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#define OCPI_TABORT (OCPI_BASE + 0x0c)
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#define OCPI_SINT1 (OCPI_BASE + 0x10)
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#define OCPI_PROT (OCPI_BASE + 0x14)
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#define OCPI_SEC (OCPI_BASE + 0x18)
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/* USB OHCI OCPI access error registers */
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#define HOSTUEADDR 0xfffba0e0
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#define HOSTUESTATUS 0xfffba0e4
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static struct clk *ocpi_ck;
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/*
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* Enables device access to OMAP buses via the OCPI bridge
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*/
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int ocpi_enable(void)
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{
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unsigned int val;
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if (!cpu_is_omap16xx())
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return -ENODEV;
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/* Enable access for OHCI in OCPI */
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val = omap_readl(OCPI_PROT);
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val &= ~0xff;
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/* val &= (1 << 0); Allow access only to EMIFS */
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omap_writel(val, OCPI_PROT);
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val = omap_readl(OCPI_SEC);
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val &= ~0xff;
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omap_writel(val, OCPI_SEC);
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return 0;
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}
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EXPORT_SYMBOL(ocpi_enable);
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static int __init omap_ocpi_init(void)
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{
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if (!cpu_is_omap16xx())
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return -ENODEV;
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ocpi_ck = clk_get(NULL, "l3_ocpi_ck");
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if (IS_ERR(ocpi_ck))
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return PTR_ERR(ocpi_ck);
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clk_enable(ocpi_ck);
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ocpi_enable();
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pr_info("OMAP OCPI interconnect driver loaded\n");
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return 0;
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}
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static void __exit omap_ocpi_exit(void)
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{
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/* REVISIT: Disable OCPI */
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if (!cpu_is_omap16xx())
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return;
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clk_disable(ocpi_ck);
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clk_put(ocpi_ck);
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}
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MODULE_AUTHOR("Tony Lindgren <tony@atomide.com>");
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MODULE_DESCRIPTION("OMAP OCPI bus controller module");
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MODULE_LICENSE("GPL");
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module_init(omap_ocpi_init);
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module_exit(omap_ocpi_exit);
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