threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
59 lines
1.7 KiB
C
59 lines
1.7 KiB
C
/*
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* arch/arm/mach-ixp4xx/include/mach/cpu.h
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*
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* IXP4XX cpu type detection
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*
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* Copyright (C) 2007 MontaVista Software, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#ifndef __ASM_ARCH_CPU_H__
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#define __ASM_ARCH_CPU_H__
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#include <linux/io.h>
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#include <asm/cputype.h>
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/* Processor id value in CP15 Register 0 */
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#define IXP42X_PROCESSOR_ID_VALUE 0x690541c0 /* including unused 0x690541Ex */
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#define IXP42X_PROCESSOR_ID_MASK 0xffffffc0
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#define IXP43X_PROCESSOR_ID_VALUE 0x69054040
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#define IXP43X_PROCESSOR_ID_MASK 0xfffffff0
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#define IXP46X_PROCESSOR_ID_VALUE 0x69054200 /* including IXP455 */
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#define IXP46X_PROCESSOR_ID_MASK 0xfffffff0
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#define cpu_is_ixp42x_rev_a0() ((read_cpuid_id() & (IXP42X_PROCESSOR_ID_MASK | 0xF)) == \
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IXP42X_PROCESSOR_ID_VALUE)
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#define cpu_is_ixp42x() ((read_cpuid_id() & IXP42X_PROCESSOR_ID_MASK) == \
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IXP42X_PROCESSOR_ID_VALUE)
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#define cpu_is_ixp43x() ((read_cpuid_id() & IXP43X_PROCESSOR_ID_MASK) == \
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IXP43X_PROCESSOR_ID_VALUE)
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#define cpu_is_ixp46x() ((read_cpuid_id() & IXP46X_PROCESSOR_ID_MASK) == \
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IXP46X_PROCESSOR_ID_VALUE)
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static inline u32 ixp4xx_read_feature_bits(void)
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{
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u32 val = ~__raw_readl(IXP4XX_EXP_CFG2);
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if (cpu_is_ixp42x_rev_a0())
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return IXP42X_FEATURE_MASK & ~(IXP4XX_FEATURE_RCOMP |
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IXP4XX_FEATURE_AES);
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if (cpu_is_ixp42x())
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return val & IXP42X_FEATURE_MASK;
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if (cpu_is_ixp43x())
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return val & IXP43X_FEATURE_MASK;
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return val & IXP46X_FEATURE_MASK;
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}
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static inline void ixp4xx_write_feature_bits(u32 value)
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{
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__raw_writel(~value, IXP4XX_EXP_CFG2);
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}
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#endif /* _ASM_ARCH_CPU_H */
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