threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
300 lines
8.9 KiB
C
300 lines
8.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef ASMARM_DMA_MAPPING_H
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#define ASMARM_DMA_MAPPING_H
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#ifdef __KERNEL__
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#include <linux/mm_types.h>
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#include <linux/scatterlist.h>
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#include <linux/dma-debug.h>
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#include <asm/memory.h>
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#include <asm/dma-iommu.h>
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#include <xen/xen.h>
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#include <asm/xen/hypervisor.h>
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#ifdef CONFIG_MTK_BOUNCING_CHECK
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#include "../../../../drivers/misc/mediatek/include/mt-plat/aee.h"
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#endif
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extern const struct dma_map_ops arm_dma_ops;
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extern const struct dma_map_ops arm_coherent_dma_ops;
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static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
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{
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return IS_ENABLED(CONFIG_MMU) ? &arm_dma_ops : &dma_noop_ops;
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}
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#ifdef __arch_page_to_dma
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#error Please update to __arch_pfn_to_dma
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#endif
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/*
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* dma_to_pfn/pfn_to_dma/dma_to_virt/virt_to_dma are architecture private
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* functions used internally by the DMA-mapping API to provide DMA
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* addresses. They must not be used by drivers.
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*/
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#ifndef __arch_pfn_to_dma
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static inline dma_addr_t pfn_to_dma(struct device *dev, unsigned long pfn)
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{
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if (dev)
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pfn -= dev->dma_pfn_offset;
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return (dma_addr_t)__pfn_to_bus(pfn);
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}
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static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr)
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{
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unsigned long pfn = __bus_to_pfn(addr);
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if (dev)
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pfn += dev->dma_pfn_offset;
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return pfn;
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}
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static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
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{
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if (dev) {
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unsigned long pfn = dma_to_pfn(dev, addr);
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return phys_to_virt(__pfn_to_phys(pfn));
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}
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return (void *)__bus_to_virt((unsigned long)addr);
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}
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static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
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{
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if (dev)
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return pfn_to_dma(dev, virt_to_pfn(addr));
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return (dma_addr_t)__virt_to_bus((unsigned long)(addr));
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}
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#else
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static inline dma_addr_t pfn_to_dma(struct device *dev, unsigned long pfn)
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{
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return __arch_pfn_to_dma(dev, pfn);
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}
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static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr)
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{
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return __arch_dma_to_pfn(dev, addr);
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}
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static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
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{
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return __arch_dma_to_virt(dev, addr);
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}
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static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
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{
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return __arch_virt_to_dma(dev, addr);
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}
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#endif
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/* The ARM override for dma_max_pfn() */
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static inline unsigned long dma_max_pfn(struct device *dev)
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{
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return dma_to_pfn(dev, *dev->dma_mask);
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}
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#define dma_max_pfn(dev) dma_max_pfn(dev)
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#define arch_setup_dma_ops arch_setup_dma_ops
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extern void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
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const struct iommu_ops *iommu, bool coherent);
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#define arch_teardown_dma_ops arch_teardown_dma_ops
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extern void arch_teardown_dma_ops(struct device *dev);
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/* do not use this function in a driver */
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static inline bool is_device_dma_coherent(struct device *dev)
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{
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return dev->archdata.dma_coherent;
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}
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static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
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{
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unsigned int offset = paddr & ~PAGE_MASK;
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return pfn_to_dma(dev, __phys_to_pfn(paddr)) + offset;
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}
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static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t dev_addr)
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{
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unsigned int offset = dev_addr & ~PAGE_MASK;
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return __pfn_to_phys(dma_to_pfn(dev, dev_addr)) + offset;
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}
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static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
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{
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u64 limit, mask;
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if (!dev->dma_mask) {
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#ifdef CONFIG_MTK_BOUNCING_CHECK
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aee_kernel_warning("Bounce Buffering", "NULL dma_mask");
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#endif
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return 0;
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}
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mask = *dev->dma_mask;
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limit = (mask + 1) & ~mask;
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if (limit && size > limit) {
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#ifdef CONFIG_MTK_BOUNCING_CHECK
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aee_kernel_warning("Bounce Buffering",
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"Incorrect dma_mask(%llx): limit(%llx), size(%llx)",
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mask, limit, size);
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#endif
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return 0;
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}
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if ((addr | (addr + size - 1)) & ~mask) {
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#ifdef CONFIG_MTK_BOUNCING_CHECK
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aee_kernel_warning("Bounce Buffering",
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"Incorrect dma_mask(%llx): addr(%llx), size(%llx)",
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mask, addr, size);
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#endif
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return 0;
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}
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return 1;
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}
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static inline void dma_mark_clean(void *addr, size_t size) { }
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/**
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* arm_dma_alloc - allocate consistent memory for DMA
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @size: required memory size
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* @handle: bus-specific DMA address
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* @attrs: optinal attributes that specific mapping properties
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*
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* Allocate some memory for a device for performing DMA. This function
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* allocates pages, and will return the CPU-viewed address, and sets @handle
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* to be the device-viewed address.
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*/
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extern void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
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gfp_t gfp, unsigned long attrs);
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/**
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* arm_dma_free - free memory allocated by arm_dma_alloc
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @size: size of memory originally requested in dma_alloc_coherent
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* @cpu_addr: CPU-view address returned from dma_alloc_coherent
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* @handle: device-view address returned from dma_alloc_coherent
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* @attrs: optinal attributes that specific mapping properties
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*
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* Free (and unmap) a DMA buffer previously allocated by
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* arm_dma_alloc().
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*
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* References to memory and mappings associated with cpu_addr/handle
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* during and after this call executing are illegal.
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*/
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extern void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
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dma_addr_t handle, unsigned long attrs);
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/**
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* arm_dma_mmap - map a coherent DMA allocation into user space
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @vma: vm_area_struct describing requested user mapping
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* @cpu_addr: kernel CPU-view address returned from dma_alloc_coherent
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* @handle: device-view address returned from dma_alloc_coherent
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* @size: size of memory originally requested in dma_alloc_coherent
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* @attrs: optinal attributes that specific mapping properties
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*
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* Map a coherent DMA buffer previously allocated by dma_alloc_coherent
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* into user space. The coherent DMA buffer must not be freed by the
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* driver until the user space mapping has been released.
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*/
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extern int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr, size_t size,
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unsigned long attrs);
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/*
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* This can be called during early boot to increase the size of the atomic
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* coherent DMA pool above the default value of 256KiB. It must be called
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* before postcore_initcall.
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*/
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extern void __init init_dma_coherent_pool_size(unsigned long size);
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/*
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* For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic"
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* and utilize bounce buffers as needed to work around limited DMA windows.
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*
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* On the SA-1111, a bug limits DMA to only certain regions of RAM.
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* On the IXP425, the PCI inbound window is 64MB (256MB total RAM)
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* On some ADI engineering systems, PCI inbound window is 32MB (12MB total RAM)
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*
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* The following are helper functions used by the dmabounce subystem
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*
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*/
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/**
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* dmabounce_register_dev
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*
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* @dev: valid struct device pointer
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* @small_buf_size: size of buffers to use with small buffer pool
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* @large_buf_size: size of buffers to use with large buffer pool (can be 0)
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* @needs_bounce_fn: called to determine whether buffer needs bouncing
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*
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* This function should be called by low-level platform code to register
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* a device as requireing DMA buffer bouncing. The function will allocate
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* appropriate DMA pools for the device.
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*/
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extern int dmabounce_register_dev(struct device *, unsigned long,
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unsigned long, int (*)(struct device *, dma_addr_t, size_t));
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/**
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* dmabounce_unregister_dev
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*
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* @dev: valid struct device pointer
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*
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* This function should be called by low-level platform code when device
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* that was previously registered with dmabounce_register_dev is removed
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* from the system.
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*
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*/
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extern void dmabounce_unregister_dev(struct device *);
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/*
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* The scatter list versions of the above methods.
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*/
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extern int arm_dma_map_sg(struct device *, struct scatterlist *, int,
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enum dma_data_direction, unsigned long attrs);
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extern void arm_dma_unmap_sg(struct device *, struct scatterlist *, int,
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enum dma_data_direction, unsigned long attrs);
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extern void arm_dma_sync_sg_for_cpu(struct device *, struct scatterlist *, int,
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enum dma_data_direction);
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extern void arm_dma_sync_sg_for_device(struct device *, struct scatterlist *, int,
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enum dma_data_direction);
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extern int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
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void *cpu_addr, dma_addr_t dma_addr, size_t size,
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unsigned long attrs);
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/*
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* For reserve iova regions
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*/
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int arm_dma_reserve(struct dma_iommu_mapping *mapping, dma_addr_t addr,
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size_t size); /*only for iommu device*/
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extern int dma_map_sg_within_reserved_iova(struct device *dev,
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struct scatterlist *sg, int nents,
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int prot, dma_addr_t dma_addr);
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extern void dma_unmap_sg_within_reserved_iova(struct device *dev,
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struct scatterlist *sg, int nents,
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int prot, size_t size);
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extern void *dma_alloc_coherent_fix_iova(struct device *dev,
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dma_addr_t dma_addr,
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size_t size, gfp_t flag);
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extern void dma_free_coherent_fix_iova(struct device *dev, void *cpu_addr,
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dma_addr_t dma_addr, size_t size);
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#endif /* __KERNEL__ */
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#endif
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