threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
55 lines
1.6 KiB
Devicetree
55 lines
1.6 KiB
Devicetree
/*
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* Device Tree Source for IGEPv2 Rev. F (TI OMAP AM/DM37x)
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*
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* Copyright (C) 2012 Javier Martinez Canillas <javier@osg.samsung.com>
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* Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include "omap3-igep0020-common.dtsi"
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/ {
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model = "IGEPv2 Rev. F (TI OMAP AM/DM37x)";
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compatible = "isee,omap3-igep0020-rev-f", "ti,omap36xx", "ti,omap3";
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/* Regulator to trigger the WL_EN signal of the Wifi module */
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lbep5clwmc_wlen: regulator-lbep5clwmc-wlen {
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compatible = "regulator-fixed";
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regulator-name = "regulator-lbep5clwmc-wlen";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio5 11 GPIO_ACTIVE_HIGH>; /* gpio_139 - WL_EN */
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enable-active-high;
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};
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};
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&omap3_pmx_core {
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lbep5clwmc_pins: pinmux_lbep5clwmc_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT | MUX_MODE4) /* mcspi1_cs3.gpio_177 - W_IRQ */
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OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat5.gpio_137 - BT_EN */
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OMAP3_CORE1_IOPAD(0x216a, PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat7.gpio_139 - WL_EN */
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>;
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};
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};
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&mmc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc2_pins &lbep5clwmc_pins>;
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vmmc-supply = <&lbep5clwmc_wlen>;
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bus-width = <4>;
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non-removable;
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#address-cells = <1>;
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#size-cells = <0>;
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wlcore: wlcore@2 {
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compatible = "ti,wl1835";
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reg = <2>;
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interrupt-parent = <&gpio6>;
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interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; /* gpio 177 */
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};
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};
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