threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
100 lines
2.1 KiB
ArmAsm
100 lines
2.1 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* arch/alpha/kernel/head.S
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*
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* initial boot stuff.. At this point, the bootloader has already
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* switched into OSF/1 PAL-code, and loaded us at the correct address
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* (START_ADDR). So there isn't much left for us to do: just set up
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* the kernel global pointer and jump to the kernel entry-point.
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*/
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#include <linux/init.h>
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#include <asm/asm-offsets.h>
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#include <asm/pal.h>
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#include <asm/setup.h>
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__HEAD
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.globl _stext
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.set noreorder
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.globl __start
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.ent __start
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_stext:
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__start:
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.prologue 0
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br $27,1f
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1: ldgp $29,0($27)
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/* We need to get current_task_info loaded up... */
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lda $8,init_thread_union
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/* ... and find our stack ... */
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lda $30,0x4000 - SIZEOF_PT_REGS($8)
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/* ... and then we can start the kernel. */
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jsr $26,start_kernel
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call_pal PAL_halt
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.end __start
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#ifdef CONFIG_SMP
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.align 3
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.globl __smp_callin
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.ent __smp_callin
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/* On entry here from SRM console, the HWPCB of the per-cpu
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slot for this processor has been loaded. We've arranged
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for the UNIQUE value for this process to contain the PCBB
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of the target idle task. */
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__smp_callin:
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.prologue 1
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ldgp $29,0($27) # First order of business, load the GP.
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call_pal PAL_rduniq # Grab the target PCBB.
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mov $0,$16 # Install it.
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call_pal PAL_swpctx
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lda $8,0x3fff # Find "current".
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bic $30,$8,$8
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jsr $26,smp_callin
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call_pal PAL_halt
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.end __smp_callin
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#endif /* CONFIG_SMP */
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#
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# The following two functions are needed for supporting SRM PALcode
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# on the PC164 (at least), since that PALcode manages the interrupt
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# masking, and we cannot duplicate the effort without causing problems
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#
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.align 3
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.globl cserve_ena
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.ent cserve_ena
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cserve_ena:
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.prologue 0
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bis $16,$16,$17
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lda $16,52($31)
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call_pal PAL_cserve
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ret ($26)
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.end cserve_ena
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.align 3
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.globl cserve_dis
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.ent cserve_dis
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cserve_dis:
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.prologue 0
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bis $16,$16,$17
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lda $16,53($31)
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call_pal PAL_cserve
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ret ($26)
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.end cserve_dis
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#
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# It is handy, on occasion, to make halt actually just loop.
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# Putting it here means we dont have to recompile the whole
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# kernel.
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#
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.align 3
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.globl halt
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.ent halt
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halt:
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.prologue 0
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call_pal PAL_halt
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.end halt
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