Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
54 lines
1.4 KiB
Plaintext
54 lines
1.4 KiB
Plaintext
* STMicroelectronics STM32 USART
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Required properties:
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- compatible: can be either:
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- "st,stm32-usart",
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- "st,stm32-uart",
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- "st,stm32f7-usart",
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- "st,stm32f7-uart",
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- "st,stm32h7-usart"
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- "st,stm32h7-uart".
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depending on whether the device supports synchronous mode
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and is compatible with stm32(f4), stm32f7 or stm32h7.
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- reg: The address and length of the peripheral registers space
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- interrupts:
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- The interrupt line for the USART instance,
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- An optional wake-up interrupt.
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- clocks: The input clock of the USART instance
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Optional properties:
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- pinctrl: The reference on the pins configuration
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- st,hw-flow-ctrl: bool flag to enable hardware flow control.
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- dmas: phandle(s) to DMA controller node(s). Refer to stm32-dma.txt
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- dma-names: "rx" and/or "tx"
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Examples:
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usart4: serial@40004c00 {
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compatible = "st,stm32-uart";
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reg = <0x40004c00 0x400>;
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interrupts = <52>;
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clocks = <&clk_pclk1>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usart4>;
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};
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usart2: serial@40004400 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40004400 0x400>;
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interrupts = <38>;
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clocks = <&clk_pclk1>;
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st,hw-flow-ctrl;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rtscts>;
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};
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usart1: serial@40011000 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40011000 0x400>;
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interrupts = <37>;
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clocks = <&rcc 0 164>;
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dmas = <&dma2 2 4 0x414 0x0>,
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<&dma2 7 4 0x414 0x0>;
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dma-names = "rx", "tx";
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};
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