threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
31 lines
1.0 KiB
Plaintext
31 lines
1.0 KiB
Plaintext
Lantiq XWAY SoC RCU reset controller binding
|
|
============================================
|
|
|
|
This binding describes a reset-controller found on the RCU module on Lantiq
|
|
XWAY SoCs.
|
|
|
|
This node has to be a sub node of the Lantiq RCU block.
|
|
|
|
-------------------------------------------------------------------------------
|
|
Required properties:
|
|
- compatible : Should be one of
|
|
"lantiq,danube-reset"
|
|
"lantiq,xrx200-reset"
|
|
- reg : Defines the following sets of registers in the parent
|
|
syscon device
|
|
- Offset of the reset set register
|
|
- Offset of the reset status register
|
|
- #reset-cells : Specifies the number of cells needed to encode the
|
|
reset line, should be 2.
|
|
The first cell takes the reset set bit and the
|
|
second cell takes the status bit.
|
|
|
|
-------------------------------------------------------------------------------
|
|
Example for the reset-controllers on the xRX200 SoCs:
|
|
reset0: reset-controller@10 {
|
|
compatible = "lantiq,xrx200-reset";
|
|
reg <0x10 0x04>, <0x14 0x04>;
|
|
|
|
#reset-cells = <2>;
|
|
};
|