threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
50 lines
1.6 KiB
Plaintext
50 lines
1.6 KiB
Plaintext
TI SOC EHRPWM based PWM controller
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Required properties:
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- compatible: Must be "ti,<soc>-ehrpwm".
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for am33xx - compatible = "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm";
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for am4372 - compatible = "ti,am4372-ehrpwm", "ti-am3352-ehrpwm", "ti,am33xx-ehrpwm";
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for da850 - compatible = "ti,da850-ehrpwm", "ti-am3352-ehrpwm", "ti,am33xx-ehrpwm";
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for dra746 - compatible = "ti,dra746-ehrpwm", "ti-am3352-ehrpwm";
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- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
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the cells format. The only third cell flag supported by this binding is
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PWM_POLARITY_INVERTED.
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- reg: physical base address and size of the registers map.
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Optional properties:
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- clocks: Handle to the PWM's time-base and functional clock.
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- clock-names: Must be set to "tbclk" and "fck".
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Example:
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ehrpwm0: pwm@48300200 { /* EHRPWM on am33xx */
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compatible = "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm";
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#pwm-cells = <3>;
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reg = <0x48300200 0x100>;
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clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
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clock-names = "tbclk", "fck";
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};
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ehrpwm0: pwm@48300200 { /* EHRPWM on am4372 */
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compatible = "ti,am4372-ehrpwm", "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm";
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#pwm-cells = <3>;
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reg = <0x48300200 0x80>;
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clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
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clock-names = "tbclk", "fck";
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ti,hwmods = "ehrpwm0";
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};
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ehrpwm0: pwm@1f00000 { /* EHRPWM on da850 */
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compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm";
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#pwm-cells = <3>;
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reg = <0x1f00000 0x2000>;
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};
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ehrpwm0: pwm@4843e200 { /* EHRPWM on dra746 */
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compatible = "ti,dra746-ehrpwm", "ti,am3352-ehrpwm";
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#pwm-cells = <3>;
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reg = <0x4843e200 0x80>;
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clocks = <&ehrpwm0_tbclk>, <&l4_root_clk_div>;
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clock-names = "tbclk", "fck";
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};
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