threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
47 lines
1.3 KiB
Plaintext
47 lines
1.3 KiB
Plaintext
STM32 Timers driver bindings
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This IP provides 3 types of timer along with PWM functionality:
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- advanced-control timers consist of a 16-bit auto-reload counter driven by a programmable
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prescaler, break input feature, PWM outputs and complementary PWM ouputs channels.
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- general-purpose timers consist of a 16-bit or 32-bit auto-reload counter driven by a
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programmable prescaler and PWM outputs.
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- basic timers consist of a 16-bit auto-reload counter driven by a programmable prescaler.
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Required parameters:
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- compatible: must be "st,stm32-timers"
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- reg: Physical base address and length of the controller's
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registers.
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- clock-names: Set to "int".
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- clocks: Phandle to the clock used by the timer module.
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For Clk properties, please refer to ../clock/clock-bindings.txt
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Optional parameters:
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- resets: Phandle to the parent reset controller.
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See ../reset/st,stm32-rcc.txt
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Optional subnodes:
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- pwm: See ../pwm/pwm-stm32.txt
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- timer: See ../iio/timer/stm32-timer-trigger.txt
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Example:
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timers@40010000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "st,stm32-timers";
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reg = <0x40010000 0x400>;
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clocks = <&rcc 0 160>;
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clock-names = "int";
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pwm {
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compatible = "st,stm32-pwm";
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pinctrl-0 = <&pwm1_pins>;
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pinctrl-names = "default";
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};
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timer@0 {
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compatible = "st,stm32-timer-trigger";
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reg = <0>;
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};
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};
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