threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
64 lines
1.8 KiB
Plaintext
64 lines
1.8 KiB
Plaintext
* Device tree bindings for Atmel Flexcom (Flexible Serial Communication Unit)
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The Atmel Flexcom is just a wrapper which embeds a SPI controller, an I2C
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controller and an USART. Only one function can be used at a time and is chosen
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at boot time according to the device tree.
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Required properties:
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- compatible: Should be "atmel,sama5d2-flexcom"
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- reg: Should be the offset/length value for Flexcom dedicated
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I/O registers (without USART, TWI or SPI registers).
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- clocks: Should be the Flexcom peripheral clock from PMC.
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- #address-cells: Should be <1>
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- #size-cells: Should be <1>
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- ranges: Should be one range for the full I/O register region
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(including USART, TWI and SPI registers).
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- atmel,flexcom-mode: Should be one of the following values:
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- <1> for USART
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- <2> for SPI
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- <3> for I2C
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Required child:
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A single available child device of type matching the "atmel,flexcom-mode"
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property.
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The phandle provided by the clocks property of the child is the same as one for
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the Flexcom parent.
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For other properties, please refer to the documentations of the respective
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device:
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- ../serial/atmel-usart.txt
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- ../spi/spi_atmel.txt
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- ../i2c/i2c-at91.txt
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Example:
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flexcom@f8034000 {
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compatible = "atmel,sama5d2-flexcom";
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reg = <0xf8034000 0x200>;
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clocks = <&flx0_clk>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0xf8034000 0x800>;
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atmel,flexcom-mode = <2>;
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spi@400 {
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compatible = "atmel,at91rm9200-spi";
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reg = <0x400 0x200>;
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interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flx0_default>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&flx0_clk>;
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clock-names = "spi_clk";
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atmel,fifo-size = <32>;
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mtd_dataflash@0 {
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compatible = "atmel,at25f512b";
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reg = <0>;
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spi-max-frequency = <20000000>;
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};
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};
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};
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