threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
36 lines
1.3 KiB
Plaintext
36 lines
1.3 KiB
Plaintext
STMicroelectronics STi System Configuration Controlled IRQs
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-----------------------------------------------------------
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On STi based systems; External, CTI (Core Sight), PMU (Performance Management),
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and PL310 L2 Cache IRQs are controlled using System Configuration registers.
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This driver is used to unmask them prior to use.
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Required properties:
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- compatible : Should be set to one of:
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"st,stih415-irq-syscfg"
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"st,stih416-irq-syscfg"
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"st,stih407-irq-syscfg"
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"st,stid127-irq-syscfg"
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- st,syscfg : Phandle to Cortex-A9 IRQ system config registers
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- st,irq-device : Array of IRQs to enable - should be 2 in length
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- st,fiq-device : Array of FIQs to enable - should be 2 in length
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Optional properties:
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- st,invert-ext : External IRQs can be inverted at will. This property inverts
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these IRQs using bitwise logic. A number of defines have been
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provided for convenience:
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ST_IRQ_SYSCFG_EXT_1_INV
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ST_IRQ_SYSCFG_EXT_2_INV
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ST_IRQ_SYSCFG_EXT_3_INV
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Example:
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irq-syscfg {
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compatible = "st,stih416-irq-syscfg";
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st,syscfg = <&syscfg_cpu>;
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st,irq-device = <ST_IRQ_SYSCFG_PMU_0>,
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<ST_IRQ_SYSCFG_PMU_1>;
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st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>,
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<ST_IRQ_SYSCFG_DISABLED>;
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st,invert-ext = <(ST_IRQ_SYSCFG_EXT_1_INV | ST_IRQ_SYSCFG_EXT_3_INV)>;
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};
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