threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
33 lines
1.3 KiB
Plaintext
33 lines
1.3 KiB
Plaintext
UniPhier AIDET
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UniPhier AIDET (ARM Interrupt Detector) is an add-on block for ARM GIC (Generic
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Interrupt Controller). GIC itself can handle only high level and rising edge
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interrupts. The AIDET provides logic inverter to support low level and falling
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edge interrupts.
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Required properties:
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- compatible: Should be one of the following:
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"socionext,uniphier-ld4-aidet" - for LD4 SoC
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"socionext,uniphier-pro4-aidet" - for Pro4 SoC
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"socionext,uniphier-sld8-aidet" - for sLD8 SoC
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"socionext,uniphier-pro5-aidet" - for Pro5 SoC
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"socionext,uniphier-pxs2-aidet" - for PXs2/LD6b SoC
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"socionext,uniphier-ld11-aidet" - for LD11 SoC
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"socionext,uniphier-ld20-aidet" - for LD20 SoC
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"socionext,uniphier-pxs3-aidet" - for PXs3 SoC
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- reg: Specifies offset and length of the register set for the device.
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- interrupt-controller: Identifies the node as an interrupt controller
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- #interrupt-cells : Specifies the number of cells needed to encode an interrupt
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source. The value should be 2. The first cell defines the interrupt number
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(corresponds to the SPI interrupt number of GIC). The second cell specifies
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the trigger type as defined in interrupts.txt in this directory.
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Example:
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aidet: aidet@5fc20000 {
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compatible = "socionext,uniphier-pro4-aidet";
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reg = <0x5fc20000 0x200>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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