threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
50 lines
1.4 KiB
Plaintext
50 lines
1.4 KiB
Plaintext
* Microchip PIC32 GPIO devices (PIO).
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Required properties:
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- compatible: "microchip,pic32mzda-gpio"
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- reg: Base address and length for the device.
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- interrupts: The port interrupt shared by all pins.
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- gpio-controller: Marks the port as GPIO controller.
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- #gpio-cells: Two. The first cell is the pin number and
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the second cell is used to specify the gpio polarity as defined in
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defined in <dt-bindings/gpio/gpio.h>:
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0 = GPIO_ACTIVE_HIGH
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1 = GPIO_ACTIVE_LOW
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2 = GPIO_OPEN_DRAIN
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- interrupt-controller: Marks the device node as an interrupt controller.
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- #interrupt-cells: Two. The first cell is the GPIO number and second cell
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is used to specify the trigger type as defined in
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<dt-bindings/interrupt-controller/irq.h>:
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IRQ_TYPE_EDGE_RISING
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IRQ_TYPE_EDGE_FALLING
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IRQ_TYPE_EDGE_BOTH
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- clocks: Clock specifier (see clock bindings for details).
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- microchip,gpio-bank: Specifies which bank a controller owns.
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- gpio-ranges: Interaction with the PINCTRL subsystem.
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Example:
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/* PORTA */
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gpio0: gpio0@1f860000 {
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compatible = "microchip,pic32mzda-gpio";
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reg = <0x1f860000 0x100>;
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interrupts = <118 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&rootclk PB4CLK>;
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microchip,gpio-bank = <0>;
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gpio-ranges = <&pic32_pinctrl 0 0 16>;
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};
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keys {
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...
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button@sw1 {
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label = "ESC";
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linux,code = <1>;
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gpios = <&gpio0 12 0>;
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};
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};
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