threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
41 lines
1.2 KiB
Plaintext
41 lines
1.2 KiB
Plaintext
* Marvell XOR engines
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Required properties:
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- compatible: Should be one of the following:
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- "marvell,orion-xor"
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- "marvell,armada-380-xor"
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- "marvell,armada-3700-xor".
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- reg: Should contain registers location and length (two sets)
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the first set is the low registers, the second set the high
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registers for the XOR engine.
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- clocks: pointer to the reference clock
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The DT node must also contains sub-nodes for each XOR channel that the
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XOR engine has. Those sub-nodes have the following required
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properties:
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- interrupts: interrupt of the XOR channel
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The sub-nodes used to contain one or several of the following
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properties, but they are now deprecated:
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- dmacap,memcpy to indicate that the XOR channel is capable of memcpy operations
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- dmacap,memset to indicate that the XOR channel is capable of memset operations
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- dmacap,xor to indicate that the XOR channel is capable of xor operations
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- dmacap,interrupt to indicate that the XOR channel is capable of
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generating interrupts
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Example:
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xor@d0060900 {
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compatible = "marvell,orion-xor";
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reg = <0xd0060900 0x100
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0xd0060b00 0x100>;
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clocks = <&coreclk 0>;
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xor00 {
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interrupts = <51>;
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};
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xor01 {
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interrupts = <52>;
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};
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};
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