threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
37 lines
1.0 KiB
Plaintext
37 lines
1.0 KiB
Plaintext
* Amlogic GXBB Clock and Reset Unit
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The Amlogic GXBB clock controller generates and supplies clock to various
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controllers within the SoC.
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Required Properties:
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- compatible: should be "amlogic,gxbb-clkc" for GXBB SoC,
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or "amlogic,gxl-clkc" for GXL and GXM SoC.
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- reg: physical base address of the clock controller and length of memory
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mapped region.
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- #clock-cells: should be 1.
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Each clock is assigned an identifier and client nodes can use this identifier
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to specify the clock which they consume. All available clocks are defined as
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preprocessor macros in the dt-bindings/clock/gxbb-clkc.h header and can be
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used in device tree sources.
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Example: Clock controller node:
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clkc: clock-controller@c883c000 {
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#clock-cells = <1>;
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compatible = "amlogic,gxbb-clkc";
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reg = <0x0 0xc883c000 0x0 0x3db>;
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};
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Example: UART controller node that consumes the clock generated by the clock
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controller:
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uart_AO: serial@c81004c0 {
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compatible = "amlogic,meson-uart";
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reg = <0xc81004c0 0x14>;
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interrupts = <0 90 1>;
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clocks = <&clkc CLKID_CLK81>;
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};
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