threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
149 lines
4.3 KiB
JSON
149 lines
4.3 KiB
JSON
[
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{
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"EventCode": "0x8",
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"Counter": "0,1,2,3",
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"UMask": "0x1",
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"EventName": "DTLB_LOAD_MISSES.ANY",
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"SampleAfterValue": "200000",
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"BriefDescription": "DTLB load misses"
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},
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{
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"EventCode": "0x8",
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"Counter": "0,1,2,3",
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"UMask": "0x20",
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"EventName": "DTLB_LOAD_MISSES.PDE_MISS",
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"SampleAfterValue": "200000",
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"BriefDescription": "DTLB load miss caused by low part of address"
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},
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{
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"EventCode": "0x8",
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"Counter": "0,1,2,3",
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"UMask": "0x10",
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"EventName": "DTLB_LOAD_MISSES.STLB_HIT",
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"SampleAfterValue": "2000000",
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"BriefDescription": "DTLB second level hit"
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},
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{
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"EventCode": "0x8",
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"Counter": "0,1,2,3",
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"UMask": "0x2",
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"EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED",
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"SampleAfterValue": "200000",
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"BriefDescription": "DTLB load miss page walks complete"
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{
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"EventCode": "0x8",
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"Counter": "0,1,2,3",
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"UMask": "0x4",
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"EventName": "DTLB_LOAD_MISSES.WALK_CYCLES",
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"SampleAfterValue": "200000",
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"BriefDescription": "DTLB load miss page walk cycles"
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},
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{
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"EventCode": "0x49",
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"Counter": "0,1,2,3",
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"UMask": "0x1",
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"EventName": "DTLB_MISSES.ANY",
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"SampleAfterValue": "200000",
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"BriefDescription": "DTLB misses"
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},
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{
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"EventCode": "0x49",
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"Counter": "0,1,2,3",
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"UMask": "0x80",
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"EventName": "DTLB_MISSES.LARGE_WALK_COMPLETED",
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"SampleAfterValue": "200000",
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"BriefDescription": "DTLB miss large page walks"
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},
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{
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"EventCode": "0x49",
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"Counter": "0,1,2,3",
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"UMask": "0x10",
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"EventName": "DTLB_MISSES.STLB_HIT",
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"SampleAfterValue": "200000",
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"BriefDescription": "DTLB first level misses but second level hit"
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},
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{
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"EventCode": "0x49",
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"Counter": "0,1,2,3",
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"UMask": "0x2",
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"EventName": "DTLB_MISSES.WALK_COMPLETED",
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"SampleAfterValue": "200000",
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"BriefDescription": "DTLB miss page walks"
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},
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{
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"EventCode": "0x49",
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"Counter": "0,1,2,3",
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"UMask": "0x4",
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"EventName": "DTLB_MISSES.WALK_CYCLES",
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"SampleAfterValue": "2000000",
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"BriefDescription": "DTLB miss page walk cycles"
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},
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{
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"EventCode": "0x4F",
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"Counter": "0,1,2,3",
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"UMask": "0x10",
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"EventName": "EPT.WALK_CYCLES",
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"SampleAfterValue": "2000000",
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"BriefDescription": "Extended Page Table walk cycles"
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},
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{
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"EventCode": "0xAE",
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"Counter": "0,1,2,3",
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"UMask": "0x1",
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"EventName": "ITLB_FLUSH",
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"SampleAfterValue": "2000000",
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"BriefDescription": "ITLB flushes"
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},
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{
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"PEBS": "1",
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"EventCode": "0xC8",
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"Counter": "0,1,2,3",
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"UMask": "0x20",
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"EventName": "ITLB_MISS_RETIRED",
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"SampleAfterValue": "200000",
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"BriefDescription": "Retired instructions that missed the ITLB (Precise Event)"
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},
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{
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"EventCode": "0x85",
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"Counter": "0,1,2,3",
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"UMask": "0x1",
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"EventName": "ITLB_MISSES.ANY",
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"SampleAfterValue": "200000",
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"BriefDescription": "ITLB miss"
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},
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{
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"EventCode": "0x85",
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"Counter": "0,1,2,3",
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"UMask": "0x2",
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"EventName": "ITLB_MISSES.WALK_COMPLETED",
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"SampleAfterValue": "200000",
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"BriefDescription": "ITLB miss page walks"
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},
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{
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"EventCode": "0x85",
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"Counter": "0,1,2,3",
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"UMask": "0x4",
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"EventName": "ITLB_MISSES.WALK_CYCLES",
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"SampleAfterValue": "2000000",
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"BriefDescription": "ITLB miss page walk cycles"
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},
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{
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"PEBS": "1",
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"EventCode": "0xCB",
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"Counter": "0,1,2,3",
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"UMask": "0x80",
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"EventName": "MEM_LOAD_RETIRED.DTLB_MISS",
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"SampleAfterValue": "200000",
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"BriefDescription": "Retired loads that miss the DTLB (Precise Event)"
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},
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{
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"PEBS": "1",
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"EventCode": "0xC",
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"Counter": "0,1,2,3",
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"UMask": "0x1",
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"EventName": "MEM_STORE_RETIRED.DTLB_MISS",
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"SampleAfterValue": "200000",
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"BriefDescription": "Retired stores that miss the DTLB (Precise Event)"
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}
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] |