threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
61 lines
2.0 KiB
C
61 lines
2.0 KiB
C
/*
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* SPEAr SPDIF IN controller header file
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*
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* Copyright (ST) 2011 Vipin Kumar (vipin.kumar@st.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef SPDIF_IN_REGS_H
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#define SPDIF_IN_REGS_H
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#define SPDIF_IN_CTRL 0x00
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#define SPDIF_IN_PRTYEN (1 << 20)
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#define SPDIF_IN_STATEN (1 << 19)
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#define SPDIF_IN_USREN (1 << 18)
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#define SPDIF_IN_VALEN (1 << 17)
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#define SPDIF_IN_BLKEN (1 << 16)
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#define SPDIF_MODE_24BIT (8 << 12)
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#define SPDIF_MODE_23BIT (7 << 12)
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#define SPDIF_MODE_22BIT (6 << 12)
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#define SPDIF_MODE_21BIT (5 << 12)
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#define SPDIF_MODE_20BIT (4 << 12)
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#define SPDIF_MODE_19BIT (3 << 12)
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#define SPDIF_MODE_18BIT (2 << 12)
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#define SPDIF_MODE_17BIT (1 << 12)
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#define SPDIF_MODE_16BIT (0 << 12)
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#define SPDIF_MODE_MASK (0x0F << 12)
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#define SPDIF_IN_VALID (1 << 11)
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#define SPDIF_IN_SAMPLE (1 << 10)
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#define SPDIF_DATA_SWAP (1 << 9)
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#define SPDIF_IN_ENB (1 << 8)
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#define SPDIF_DATA_REVERT (1 << 7)
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#define SPDIF_XTRACT_16BIT (1 << 6)
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#define SPDIF_FIFO_THRES_16 (16 << 0)
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#define SPDIF_IN_IRQ_MASK 0x04
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#define SPDIF_IN_IRQ 0x08
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#define SPDIF_IRQ_FIFOWRITE (1 << 0)
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#define SPDIF_IRQ_EMPTYFIFOREAD (1 << 1)
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#define SPDIF_IRQ_FIFOFULL (1 << 2)
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#define SPDIF_IRQ_OUTOFRANGE (1 << 3)
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#define SPDIF_IN_STA 0x0C
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#define SPDIF_IN_LOCK (0x1 << 0)
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#endif /* SPDIF_IN_REGS_H */
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