threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
53 lines
1.7 KiB
C
53 lines
1.7 KiB
C
/*
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* Copyright (c) 2014, The Linux Foundation. All rights reserved.
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* Copyright (c) BayLibre, SAS.
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* Author : Neil Armstrong <narmstrong@baylibre.com>
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _DT_BINDINGS_CLK_LCC_MDM9615_H
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#define _DT_BINDINGS_CLK_LCC_MDM9615_H
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#define PLL4 0
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#define MI2S_OSR_SRC 1
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#define MI2S_OSR_CLK 2
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#define MI2S_DIV_CLK 3
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#define MI2S_BIT_DIV_CLK 4
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#define MI2S_BIT_CLK 5
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#define PCM_SRC 6
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#define PCM_CLK_OUT 7
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#define PCM_CLK 8
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#define SLIMBUS_SRC 9
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#define AUDIO_SLIMBUS_CLK 10
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#define SPS_SLIMBUS_CLK 11
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#define CODEC_I2S_MIC_OSR_SRC 12
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#define CODEC_I2S_MIC_OSR_CLK 13
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#define CODEC_I2S_MIC_DIV_CLK 14
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#define CODEC_I2S_MIC_BIT_DIV_CLK 15
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#define CODEC_I2S_MIC_BIT_CLK 16
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#define SPARE_I2S_MIC_OSR_SRC 17
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#define SPARE_I2S_MIC_OSR_CLK 18
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#define SPARE_I2S_MIC_DIV_CLK 19
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#define SPARE_I2S_MIC_BIT_DIV_CLK 20
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#define SPARE_I2S_MIC_BIT_CLK 21
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#define CODEC_I2S_SPKR_OSR_SRC 22
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#define CODEC_I2S_SPKR_OSR_CLK 23
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#define CODEC_I2S_SPKR_DIV_CLK 24
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#define CODEC_I2S_SPKR_BIT_DIV_CLK 25
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#define CODEC_I2S_SPKR_BIT_CLK 26
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#define SPARE_I2S_SPKR_OSR_SRC 27
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#define SPARE_I2S_SPKR_OSR_CLK 28
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#define SPARE_I2S_SPKR_DIV_CLK 29
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#define SPARE_I2S_SPKR_BIT_DIV_CLK 30
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#define SPARE_I2S_SPKR_BIT_CLK 31
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#endif
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