threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
490 lines
14 KiB
C
490 lines
14 KiB
C
/*
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* Copyright (c) 2018 MediaTek Inc.
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* Author: Light Hsieh <light.hsieh@mediatek.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#if defined(CONFIG_PINCTRL_MTK_ALTERNATIVE)
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static int mtk_pinctrl_get_gpio_output(struct mtk_pinctrl *pctl, int pin)
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{
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return mtk_pinctrl_get_gpio_value(pctl, pin,
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pctl->devdata->n_pin_dout, pctl->devdata->pin_dout_grps);
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}
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static int mtk_pinctrl_set_gpio_output(struct mtk_pinctrl *pctl,
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int pin, int value)
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{
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#ifndef GPIO_DEBUG
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return mtk_pinctrl_update_gpio_value(pctl, pin, value,
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pctl->devdata->n_pin_dout, pctl->devdata->pin_dout_grps);
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#else
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pr_info("config pin = %d, value = %d\n", pin, value);
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mtk_pinctrl_update_gpio_value(pctl, pin, value,
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pctl->devdata->n_pin_dout, pctl->devdata->pin_dout_grps);
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pr_info("set pin = %d, value = %d\n", pin,
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mtk_pinctrl_get_gpio_output(pctl, pin));
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return 0;
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#endif
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}
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static int mtk_pinctrl_get_gpio_input(struct mtk_pinctrl *pctl, int pin)
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{
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return mtk_pinctrl_get_gpio_value(pctl, pin,
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pctl->devdata->n_pin_din, pctl->devdata->pin_din_grps);
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}
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static int mtk_pinctrl_get_gpio_direction(struct mtk_pinctrl *pctl, int pin)
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{
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return mtk_pinctrl_get_gpio_value(pctl, pin,
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pctl->devdata->n_pin_dir, pctl->devdata->pin_dir_grps);
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}
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static int mtk_pinctrl_set_gpio_direction(struct mtk_pinctrl *pctl,
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int pin, bool input)
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{
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#ifndef GPIO_DEBUG
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return mtk_pinctrl_update_gpio_value(pctl, pin, input,
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pctl->devdata->n_pin_dir, pctl->devdata->pin_dir_grps);
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#else
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pr_info("config pin = %d, dir = %d\n", pin, input);
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mtk_pinctrl_update_gpio_value(pctl, pin, input,
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pctl->devdata->n_pin_dir, pctl->devdata->pin_dir_grps);
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pr_info("set pin = %d, dir = %d\n", pin,
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mtk_pinctrl_get_gpio_direction(pctl, pin));
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return 0;
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#endif
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}
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static int mtk_pinctrl_get_gpio_mode(struct mtk_pinctrl *pctl, int pin)
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{
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return mtk_pinctrl_get_gpio_value(pctl, pin,
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pctl->devdata->n_pin_mode, pctl->devdata->pin_mode_grps);
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}
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static int mtk_pinctrl_set_gpio_mode(struct mtk_pinctrl *pctl,
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int pin, unsigned long mode)
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{
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#ifndef GPIO_DEBUG
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return mtk_pinctrl_update_gpio_value(pctl, pin, mode,
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pctl->devdata->n_pin_mode, pctl->devdata->pin_mode_grps);
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#else
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pr_info("config pin = %d, mode = %d\n", pin, (int)mode);
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mtk_pinctrl_update_gpio_value(pctl, pin, mode,
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pctl->devdata->n_pin_mode, pctl->devdata->pin_mode_grps);
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pr_info("set pin = %d, mode = %d\n", pin,
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mtk_pinctrl_get_gpio_mode(pctl, pin));
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return 0;
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#endif
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}
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static int mtk_pinctrl_get_gpio_driving(struct mtk_pinctrl *pctl, int pin)
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{
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return mtk_pinctrl_get_gpio_value(pctl, pin,
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pctl->devdata->n_pin_drv, pctl->devdata->pin_drv_grps);
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}
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static int mtk_pinctrl_set_gpio_driving(struct mtk_pinctrl *pctl,
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int pin, unsigned char driving)
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{
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#ifndef GPIO_DEBUG
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return mtk_pinctrl_update_gpio_value(pctl, pin, driving,
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pctl->devdata->n_pin_drv, pctl->devdata->pin_drv_grps);
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#else
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pr_info("config pin = %d, driving = %d\n", pin, driving);
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mtk_pinctrl_update_gpio_value(pctl, pin, driving,
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pctl->devdata->n_pin_drv, pctl->devdata->pin_drv_grps);
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pr_info("set pin = %d, driving = %d\n", pin,
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mtk_pinctrl_get_gpio_driving(pctl, pin));
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return 0;
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#endif
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}
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static int mtk_pinctrl_get_gpio_smt(struct mtk_pinctrl *pctl, int pin)
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{
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return mtk_pinctrl_get_gpio_value(pctl, pin,
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pctl->devdata->n_pin_smt, pctl->devdata->pin_smt_grps);
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}
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static int mtk_pinctrl_set_gpio_smt(struct mtk_pinctrl *pctl,
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int pin, bool enable)
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{
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return mtk_pinctrl_update_gpio_value(pctl, pin, enable,
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pctl->devdata->n_pin_smt, pctl->devdata->pin_smt_grps);
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}
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static int mtk_pinctrl_get_gpio_ies(struct mtk_pinctrl *pctl, int pin)
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{
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return mtk_pinctrl_get_gpio_value(pctl, pin,
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pctl->devdata->n_pin_ies, pctl->devdata->pin_ies_grps);
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}
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static int mtk_pinctrl_set_gpio_ies(struct mtk_pinctrl *pctl,
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int pin, bool enable)
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{
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return mtk_pinctrl_update_gpio_value(pctl, pin, enable,
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pctl->devdata->n_pin_ies, pctl->devdata->pin_ies_grps);
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}
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static int mtk_pinmux_get(struct gpio_chip *chip, unsigned int offset)
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{
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unsigned int reg_addr;
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unsigned char bit;
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unsigned int pinmux = 0;
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unsigned int mask = (1L << GPIO_MODE_BITS) - 1;
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struct mtk_pinctrl *pctl = gpiochip_get_data(chip);
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if (pctl->devdata->pin_mode_grps)
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return mtk_pinctrl_get_gpio_mode(pctl, offset);
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reg_addr = ((offset / MAX_GPIO_MODE_PER_REG) << pctl->devdata->port_shf)
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+ pctl->devdata->pinmux_offset;
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bit = offset % MAX_GPIO_MODE_PER_REG;
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mask <<= (GPIO_MODE_BITS * bit);
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regmap_read(mtk_get_regmap(pctl, offset), reg_addr, &pinmux);
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return ((pinmux & mask) >> (GPIO_MODE_BITS * bit));
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}
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static int mtk_gpio_get_in(struct gpio_chip *chip, unsigned int offset)
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{
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unsigned int reg_addr;
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unsigned int bit;
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unsigned int read_val = 0;
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struct mtk_pinctrl *pctl = gpiochip_get_data(chip);
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if (pctl->devdata->pin_din_grps)
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return mtk_pinctrl_get_gpio_input(pctl, offset);
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reg_addr = mtk_get_port(pctl, offset) +
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pctl->devdata->din_offset;
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bit = BIT(offset & 0xf);
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regmap_read(mtk_get_regmap(pctl, offset), reg_addr, &read_val);
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return !!(read_val & bit);
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}
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static int mtk_gpio_get_out(struct gpio_chip *chip, unsigned int offset)
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{
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unsigned int reg_addr;
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unsigned int bit;
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unsigned int read_val = 0;
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struct mtk_pinctrl *pctl = gpiochip_get_data(chip);
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if (pctl->devdata->pin_dout_grps)
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return mtk_pinctrl_get_gpio_output(pctl, offset);
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reg_addr = mtk_get_port(pctl, offset) +
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pctl->devdata->dout_offset;
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bit = BIT(offset & pctl->devdata->port_mask);
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regmap_read(mtk_get_regmap(pctl, offset), reg_addr, &read_val);
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return !!(read_val & bit);
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}
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static int mtk_pullen_get(struct gpio_chip *chip, unsigned int offset)
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{
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unsigned int reg_addr;
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unsigned int bit;
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unsigned int pull_en = 0;
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struct mtk_pinctrl *pctl = gpiochip_get_data(chip);
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int samereg = 0;
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/* For phone, if the pull_en have been implemented */
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if (pctl->devdata->mtk_pctl_get_pull_en)
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return pctl->devdata->mtk_pctl_get_pull_en(pctl, offset);
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if (pctl->devdata->spec_pull_get) {
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samereg =
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pctl->devdata->spec_pull_get(mtk_get_regmap(pctl,
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offset), offset);
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if (samereg != -1) {
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pull_en = (samereg >> 1) & 0x3;
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return pull_en;
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}
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}
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reg_addr = mtk_get_port(pctl, offset) + pctl->devdata->pullen_offset;
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bit = BIT(offset & pctl->devdata->port_mask);
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regmap_read(mtk_get_regmap(pctl, offset), reg_addr, &pull_en);
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return !!(pull_en & bit);
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}
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static int mtk_pullsel_get(struct gpio_chip *chip, unsigned int offset)
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{
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unsigned int reg_addr;
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unsigned int bit;
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unsigned int pull_sel = 0;
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struct mtk_pinctrl *pctl = gpiochip_get_data(chip);
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if (pctl->devdata->mtk_pctl_get_pull_sel)
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return pctl->devdata->mtk_pctl_get_pull_sel(pctl, offset);
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if (pctl->devdata->spec_pull_get) {
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pull_sel =
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pctl->devdata->spec_pull_get(mtk_get_regmap(pctl,
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offset), offset);
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if (pull_sel != -1)
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return pull_sel;
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}
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reg_addr = mtk_get_port(pctl, offset) + pctl->devdata->pullsel_offset;
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bit = BIT(offset & pctl->devdata->port_mask);
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regmap_read(mtk_get_regmap(pctl, offset), reg_addr, &pull_sel);
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return !!(pull_sel & bit);
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}
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static int mtk_ies_get(struct gpio_chip *chip, unsigned int offset)
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{
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unsigned int reg_addr;
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unsigned char bit;
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unsigned int ies;
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struct mtk_pinctrl *pctl = gpiochip_get_data(chip);
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if (pctl->devdata->pin_ies_grps)
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return mtk_pinctrl_get_gpio_ies(pctl, offset);
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if (!pctl->devdata->spec_ies_get ||
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pctl->devdata->ies_offset == MTK_PINCTRL_NOT_SUPPORT)
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return -1;
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/**
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* Due to some soc are not support ies config, add this special
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* control to handle it.
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*/
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if (pctl->devdata->spec_ies_get) {
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ies = pctl->devdata->spec_ies_get(mtk_get_regmap(pctl, offset),
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offset);
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if (ies != -1)
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return ies;
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}
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reg_addr = mtk_get_port(pctl, offset) + pctl->devdata->ies_offset;
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bit = BIT(offset & pctl->devdata->port_mask);
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regmap_read(mtk_get_regmap(pctl, offset), reg_addr, &ies);
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return !!(ies & bit);
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}
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static int mtk_smt_get(struct gpio_chip *chip, unsigned int offset)
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{
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unsigned int reg_addr;
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unsigned char bit;
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unsigned int smt;
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struct mtk_pinctrl *pctl = gpiochip_get_data(chip);
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if (pctl->devdata->pin_smt_grps)
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return mtk_pinctrl_get_gpio_smt(pctl, offset);
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if (!pctl->devdata->spec_smt_get ||
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pctl->devdata->smt_offset == MTK_PINCTRL_NOT_SUPPORT)
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return -1;
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/**
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* Due to some soc are not support smt config, add this special
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* control to handle it.
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*/
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if (pctl->devdata->spec_smt_get) {
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smt = pctl->devdata->spec_smt_get(mtk_get_regmap(pctl, offset),
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offset);
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if (smt != -1)
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return smt;
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}
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reg_addr = mtk_get_port(pctl, offset) + pctl->devdata->smt_offset;
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bit = BIT(offset & pctl->devdata->port_mask);
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regmap_read(mtk_get_regmap(pctl, offset), reg_addr, &smt);
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return !!(smt & bit);
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}
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static int mtk_driving_get(struct gpio_chip *chip, unsigned int offset)
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{
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const struct mtk_pin_drv_grp *pin_drv;
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unsigned int val = 0;
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unsigned int bits, mask, shift;
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const struct mtk_drv_group_desc *drv_grp;
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struct mtk_pinctrl *pctl = gpiochip_get_data(chip);
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if (offset >= pctl->devdata->npins)
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return -1;
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if (pctl->devdata->pin_drv_grps)
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return mtk_pinctrl_get_gpio_driving(pctl, offset);
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pin_drv = mtk_find_pin_drv_grp_by_pin(pctl, offset);
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if (!pin_drv || pin_drv->grp > pctl->devdata->n_grp_cls)
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return -1;
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drv_grp = pctl->devdata->grp_desc + pin_drv->grp;
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bits = drv_grp->high_bit - drv_grp->low_bit + 1;
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mask = BIT(bits) - 1;
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shift = pin_drv->bit + drv_grp->low_bit;
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mask <<= shift;
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regmap_read(mtk_get_regmap(pctl, offset), pin_drv->offset, &val);
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return ((val & mask) >> shift);
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}
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static ssize_t mtk_gpio_show_pin(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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int len = 0;
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int bufLen = PAGE_SIZE;
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struct mtk_pinctrl *pctl = dev_get_drvdata(dev);
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struct gpio_chip *chip = pctl->chip;
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unsigned int i;
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int pull_val;
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len += snprintf(buf+len, bufLen-len,
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"PIN: [MODE] [DIR] [DOUT] [DIN] [PULL_EN] [PULL_SEL] [IES] [SMT] [DRIVE] ( [R1] [R0] )\n");
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for (i = 0; i < chip->ngpio; i++) {
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pull_val = mtk_pullsel_get(chip, i);
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len += snprintf(buf+len, bufLen-len,
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"%4d:% d% d% d% d% d% d% d% d% d",
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i,
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mtk_pinmux_get(chip, i),
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!mtk_gpio_get_direction(chip, i),
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mtk_gpio_get_out(chip, i),
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mtk_gpio_get_in(chip, i),
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mtk_pullen_get(chip, i),
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(pull_val >= 0) ? (pull_val&1) : -1,
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mtk_ies_get(chip, i),
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mtk_smt_get(chip, i),
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mtk_driving_get(chip, i));
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if ((pull_val & 8) && (pull_val >= 0))
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len += snprintf(buf+len, bufLen-len, " %d %d",
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!!(pull_val&4), !!(pull_val&2));
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len += snprintf(buf+len, bufLen-len, "\n");
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}
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return len;
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}
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void gpio_dump_regs_range(int start, int end)
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{
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struct gpio_chip *chip;
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unsigned int i;
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int pull_val;
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if (!pctl_alt) {
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pr_debug("[gpio_dump_regs]error: pinctrl does not exist\n");
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return;
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}
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chip = pctl_alt->chip;
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pr_debug("PIN: [MODE] [DIR] [DOUT] [DIN][PULL_EN] [PULL_SEL] [IES] [SMT] [DRIVE] ( [R1] [R0] )\n");
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if (start < 0) {
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start = 0;
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end = chip->ngpio-1;
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}
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if (end > chip->ngpio - 1)
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end = chip->ngpio - 1;
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for (i = start; i <= end; i++) {
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pull_val = mtk_pullsel_get(chip, i);
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pr_debug("%4d: %d%d%d%d%d%d%d%d%d",
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i, mtk_pinmux_get(chip, i),
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!mtk_gpio_get_direction(chip, i),
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mtk_gpio_get_out(chip, i),
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mtk_gpio_get_in(chip, i),
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mtk_pullen_get(chip, i),
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(pull_val >= 0) ? (pull_val&1) : -1,
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mtk_ies_get(chip, i),
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mtk_smt_get(chip, i),
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mtk_driving_get(chip, i));
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if ((pull_val & MTK_PUPD_R1R0_BIT_SUPPORT) && (pull_val >= 0))
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pr_debug(" %d %d\n", !!(pull_val&4), !!(pull_val&2));
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else
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pr_debug("\n");
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}
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}
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void gpio_dump_regs(void)
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{
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gpio_dump_regs_range(-1, -1);
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}
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static ssize_t mtk_gpio_store_pin(struct device *dev,
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struct device_attribute *attr, const char *buf, size_t count)
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{
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int pin, val;
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int val_set;
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struct mtk_pinctrl *pctl = dev_get_drvdata(dev);
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struct pinctrl_dev *pctldev = pctl->pctl_dev;
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if (!strncmp(buf, "mode", 4) &&
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(sscanf(buf+4, "%d %d", &pin, &val) == 2)) {
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val_set = mtk_pmx_set_mode(pctldev, pin, val);
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} else if (!strncmp(buf, "dir", 3) &&
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(sscanf(buf+3, "%d %d", &pin, &val) == 2)) {
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val_set = mtk_pmx_gpio_set_direction(pctldev, NULL, pin, !val);
|
|
} else if (!strncmp(buf, "out", 3) &&
|
|
(sscanf(buf+3, "%d %d", &pin, &val) == 2)) {
|
|
mtk_pmx_gpio_set_direction(pctldev, NULL, pin, false);
|
|
mtk_gpio_set(pctl->chip, pin, val);
|
|
} else if (!strncmp(buf, "pullen", 6) &&
|
|
(sscanf(buf+6, "%d %d", &pin, &val) == 2)) {
|
|
val_set = mtk_pconf_set_pull_select(pctl, pin, !!val,
|
|
false, MTK_PUPD_SET_R1R0_00 + val);
|
|
} else if (!strncmp(buf, "pullsel", 7) &&
|
|
(sscanf(buf+7, "%d %d", &pin, &val) == 2)) {
|
|
val_set = mtk_pconf_set_pull_select(pctl, pin, true,
|
|
!!val, MTK_PUPD_SET_R1R0_01);
|
|
} else if (!strncmp(buf, "ies", 3) &&
|
|
(sscanf(buf+3, "%d %d", &pin, &val) == 2)) {
|
|
val_set = mtk_pconf_set_ies_smt(pctl, pin, val,
|
|
PIN_CONFIG_INPUT_ENABLE);
|
|
} else if (!strncmp(buf, "smt", 3) &&
|
|
(sscanf(buf+3, "%d %d", &pin, &val) == 2)) {
|
|
val_set = mtk_pconf_set_ies_smt(pctl, pin, val,
|
|
PIN_CONFIG_INPUT_SCHMITT_ENABLE);
|
|
}
|
|
return count;
|
|
}
|
|
|
|
static DEVICE_ATTR(mt_gpio, 0664, mtk_gpio_show_pin, mtk_gpio_store_pin);
|
|
|
|
static struct device_attribute *gpio_attr_list[] = {
|
|
&dev_attr_mt_gpio,
|
|
};
|
|
|
|
static int mtk_gpio_create_attr(struct device *dev)
|
|
{
|
|
int idx, err = 0;
|
|
int num = ARRAY_SIZE(gpio_attr_list);
|
|
|
|
if (!dev)
|
|
return -EINVAL;
|
|
|
|
for (idx = 0; idx < num; idx++) {
|
|
err = device_create_file(dev, gpio_attr_list[idx]);
|
|
if (err)
|
|
break;
|
|
}
|
|
|
|
return err;
|
|
}
|
|
|
|
int mtk_pctrl_get_gpio_chip_base(void)
|
|
{
|
|
if (pctl_alt)
|
|
return pctl_alt->chip->base;
|
|
pr_info("mtk_pinctrl is not initialized\n");
|
|
return 0;
|
|
}
|
|
#endif
|