threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
45 lines
1.3 KiB
C
45 lines
1.3 KiB
C
/* Altera TSE SGDMA and MSGDMA Linux driver
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* Copyright (C) 2014 Altera Corporation. All rights reserved
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "altera_tse.h"
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#include "altera_utils.h"
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void tse_set_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask)
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{
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u32 value = csrrd32(ioaddr, offs);
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value |= bit_mask;
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csrwr32(value, ioaddr, offs);
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}
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void tse_clear_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask)
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{
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u32 value = csrrd32(ioaddr, offs);
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value &= ~bit_mask;
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csrwr32(value, ioaddr, offs);
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}
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int tse_bit_is_set(void __iomem *ioaddr, size_t offs, u32 bit_mask)
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{
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u32 value = csrrd32(ioaddr, offs);
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return (value & bit_mask) ? 1 : 0;
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}
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int tse_bit_is_clear(void __iomem *ioaddr, size_t offs, u32 bit_mask)
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{
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u32 value = csrrd32(ioaddr, offs);
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return (value & bit_mask) ? 0 : 1;
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}
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