threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
154 lines
3.1 KiB
C
154 lines
3.1 KiB
C
/*
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* Copyright (C) 2019 MediaTek Inc.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __VPU_DUMP_H__
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#define __VPU_DUMP_H__
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#include "vpu_cfg.h"
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#include "vpu_drv.h"
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#ifdef CONFIG_MTK_M4U
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extern int m4u_dump_reg_for_vpu_hang_issue(void);
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#else
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#define m4u_dump_reg_for_vpu_hang_issue(...)
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#endif
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struct vpu_device;
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struct vpu_dmp {
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// general info
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char info[VPU_DMP_INFO_SZ];
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uint64_t time;
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struct vpu_request req;
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// device
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int vd_state;
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uint32_t vd_dev_state;
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// registers
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uint32_t r_info[VPU_DMP_REG_CNT_INFO];
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uint32_t r_dbg[VPU_DMP_REG_CNT_DBG];
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uint32_t r_CG_CON;
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uint32_t r_SW_RST;
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uint32_t r_DONE_ST;
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uint32_t r_CTRL;
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struct vpu_algo alg;
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int c_prio;
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int c_prio_max;
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uint64_t c_timeout;
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// memory
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uint8_t m_reset[VPU_DMP_RESET_SZ];
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uint8_t m_main[VPU_DMP_MAIN_SZ];
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uint8_t m_kernel[VPU_DMP_KERNEL_SZ];
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uint8_t m_iram[VPU_DMP_IRAM_SZ];
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uint8_t m_work[VPU_DMP_WORK_SZ];
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uint8_t m_reg[VPU_DMP_REG_SZ];
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uint8_t m_imem[VPU_DMP_IMEM_SZ];
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uint8_t m_dmem[VPU_DMP_DMEM_SZ];
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// iomem
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uint8_t m_ipu_conn[VPU_DMP_SZ];
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uint8_t m_ipu_vcore[VPU_DMP_SZ];
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uint8_t m_infra_cfg[VPU_DMP_SZ];
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uint8_t m_sleep[VPU_DMP_SZ];
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uint8_t m_gals[VPU_DMP_SZ];
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uint8_t m_smi_cmn0[VPU_DMP_SZ];
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uint8_t m_smi_cmn1[VPU_DMP_SZ];
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};
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#ifdef CONFIG_MTK_VPU_SUPPORT
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void vpu_dmp_init(int core);
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void vpu_dmp_exit(int core);
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int vpu_dmp_create_locked(int core, struct vpu_request *req,
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const char *fmt, ...);
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void vpu_dmp_free_locked(int core);
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void vpu_dmp_free_all(void);
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void vpu_dmp_seq_core(struct seq_file *s, int core);
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void vpu_dmp_seq(struct seq_file *s);
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#define vpu_dmp_create(core, req, fmt, args...) do { \
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pr_info("%s: vpu_dmp_create: vpu%d\n", __func__, core); \
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vpu_lock(core); \
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if (!vpu_get_power(core, false)) { \
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vpu_dmp_create_locked(core, req, fmt, ##args); \
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vpu_put_power(core, VPT_ENQUE_ON); \
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} else { \
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pr_info("%s: vpu_get_power: failed\n", __func__); \
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} \
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vpu_unlock(core); \
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} while (0)
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#define vpu_dmp_free(core) do { \
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pr_info("%s: vpu_dmp_free\n", __func__); \
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vpu_lock(core); \
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vpu_dmp_free_locked(core); \
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vpu_unlock(core); \
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} while (0)
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#else
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static inline
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void vpu_dmp_init(int core)
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{
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}
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static inline
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void vpu_dmp_exit(int core)
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{
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}
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static inline
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int vpu_dmp_create_locked(int core, struct vpu_request *req,
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const char *fmt, ...)
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{
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return 0;
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}
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static inline
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int vpu_dmp_create(int core, struct vpu_request *req,
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const char *fmt, ...)
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{
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return 0;
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}
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static inline
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void vpu_dmp_free_locked(int core)
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{
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}
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static inline
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void vpu_dmp_free(int core)
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{
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}
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static inline
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void vpu_dmp_free_all(void)
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{
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}
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static inline
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void vpu_dmp_seq_core(struct seq_file *s, int core)
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{
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}
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static inline
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void vpu_dmp_seq(struct seq_file *s)
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{
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}
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#endif
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#endif
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