threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
116 lines
3.9 KiB
C
116 lines
3.9 KiB
C
/*
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* MUSB OTG driver - support for Mentor's DMA controller
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*
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* Copyright 2005 Mentor Graphics Corporation
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* Copyright (C) 2005-2007 by Texas Instruments
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*
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* Copyright 2015 Mediatek Inc.
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* Marvin Lin <marvin.lin@mediatek.com>
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* Arvin Wang <arvin.wang@mediatek.com>
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* Vincent Fan <vincent.fan@mediatek.com>
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* Bryant Lu <bryant.lu@mediatek.com>
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* Yu-Chang Wang <yu-chang.wang@mediatek.com>
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* Macpaul Lin <macpaul.lin@mediatek.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program,
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*
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* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include "musbfsh_dma.h"
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#define MUSBFSH_HSDMA_BASE 0x200
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#define MUSBFSH_HSDMA_INTR (MUSBFSH_HSDMA_BASE + 0x0)
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#define MUSBFSH_HSDMA_DMA_INTR_UNMASK (MUSBFSH_HSDMA_INTR + 0x1)
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#define MUSBFSH_HSDMA_DMA_INTR_UNMASK_CLEAR (MUSBFSH_HSDMA_INTR + 0x2)
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#define MUSBFSH_HSDMA_DMA_INTR_UNMASK_SET (MUSBFSH_HSDMA_INTR + 0x3)
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#define MUSBFSH_HSDMA_CONTROL 0x4
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#define MUSBFSH_HSDMA_ADDRESS 0x8
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#define MUSBFSH_HSDMA_COUNT 0xc
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/* _bchannel starts from 0 */
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#define MUSBFSH_HSDMA_CHANNEL_OFFSET(_bchannel, _offset) \
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(MUSBFSH_HSDMA_BASE + (_bchannel << 4) + _offset)
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#define musbfsh_read_hsdma_addr(mbase, bchannel) \
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musbfsh_readl(mbase, \
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MUSBFSH_HSDMA_CHANNEL_OFFSET(bchannel, \
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MUSBFSH_HSDMA_ADDRESS))
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#define musbfsh_write_hsdma_addr(mbase, bchannel, addr) \
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musbfsh_writel(mbase, \
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MUSBFSH_HSDMA_CHANNEL_OFFSET(bchannel, \
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MUSBFSH_HSDMA_ADDRESS), \
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addr)
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#define musbfsh_read_hsdma_count(mbase, bchannel) \
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musbfsh_readl(mbase, \
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MUSBFSH_HSDMA_CHANNEL_OFFSET(bchannel, MUSBFSH_HSDMA_COUNT))
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#define musbfsh_write_hsdma_count(mbase, bchannel, len) \
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musbfsh_writel(mbase, \
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MUSBFSH_HSDMA_CHANNEL_OFFSET(bchannel, \
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MUSBFSH_HSDMA_COUNT), \
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len)
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/* control register (16-bit): */
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#define MUSBFSH_HSDMA_ENABLE_SHIFT 0
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#define MUSBFSH_HSDMA_TRANSMIT_SHIFT 1
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#define MUSBFSH_HSDMA_MODE1_SHIFT 2
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#define MUSBFSH_HSDMA_IRQENABLE_SHIFT 3
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#define MUSBFSH_HSDMA_ENDPOINT_SHIFT 4
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#define MUSBFSH_HSDMA_BUSERROR_SHIFT 8
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#define MUSBFSH_HSDMA_BURSTMODE_SHIFT 9
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#define MUSBFSH_HSDMA_BURSTMODE (3 << MUSBFSH_HSDMA_BURSTMODE_SHIFT)
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#define MUSBFSH_HSDMA_BURSTMODE_UNSPEC 0
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#define MUSBFSH_HSDMA_BURSTMODE_INCR4 1
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#define MUSBFSH_HSDMA_BURSTMODE_INCR8 2
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#define MUSBFSH_HSDMA_BURSTMODE_INCR16 3
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#ifndef MUSBFSH_HSDMA_CHANNELS
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#define MUSBFSH_HSDMA_CHANNELS 8
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#endif
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struct musbfsh_dma_controller;
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struct musbfsh_dma_channel {
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struct dma_channel channel;
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struct musbfsh_dma_controller *controller;
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u32 start_addr;
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u32 len;
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u16 max_packet_sz;
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u8 idx;
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u8 epnum;
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u8 transmit;
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};
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struct musbfsh_dma_controller {
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struct dma_controller controller;
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struct musbfsh_dma_channel channel[MUSBFSH_HSDMA_CHANNELS];
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void *private_data;
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void __iomem *base;
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u8 channel_count;
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u8 used_channels;
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u8 irq;
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};
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