Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
166 lines
4.4 KiB
C
166 lines
4.4 KiB
C
/*
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* Copyright (C) 2015 MediaTek Inc.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/rtc.h>
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#include <linux/timer.h>
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#include <linux/workqueue.h>
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#include <linux/io.h>
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#define TIME_CHANGE_32K_FROM_13M 10
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struct timer_list minute_timer;
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struct work_struct work_poll;
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struct rtc_device *rtc_dev;
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static void __iomem *spm_register_lock;
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static void __iomem *control_mux;
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static void __iomem *select_clock;
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static void __iomem *systimer_base;
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#define SYSTIMER_CNTCR (0x0)
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#define SYSTIMER_CNTSR (0x4)
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#define SYSTIMER_CNTCV_L (0x8)
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#define SYSTIMER_CNTCV_H (0xC)
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static uint64_t last_delta;
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static uint64_t read_rtc_time_ns(void)
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{
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int err = 0;
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uint64_t rtc_time_ns = 0;
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struct rtc_time tm;
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struct timespec64 rtc_time;
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err = rtc_read_time(rtc_dev, &tm);
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rtc_time.tv_sec = rtc_tm_to_time64(&tm);
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rtc_time.tv_nsec = tm.tm_cnt * (1000000000 / 32768);
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rtc_time_ns = rtc_time.tv_sec * 1000000000 + rtc_time.tv_nsec;
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return rtc_time_ns;
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}
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static uint64_t read_systimer_cnt_high_low(void)
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{
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uint64_t cyc = 0;
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uint32_t high = 0, low = 0;
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local_irq_disable();
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low = readl(systimer_base + SYSTIMER_CNTCV_L);
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high = readl(systimer_base + SYSTIMER_CNTCV_H);
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local_irq_enable();
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cyc = high;
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cyc <<= 32;
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cyc += low;
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return cyc;
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}
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static uint64_t cyc_to_ns(uint64_t cyc)
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{
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u64 num, max = ULLONG_MAX;
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u32 mult = 161319385;
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u32 shift = 21;
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s64 nsec = 0;
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do_div(max, mult);
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if (cyc > max) {
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num = div64_u64(cyc, max);
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nsec = (((u64) max * mult) >> shift) * num;
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cyc -= num * max;
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}
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nsec += ((u64) cyc * mult) >> shift;
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return nsec;
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}
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static void print_systimer_rtc_time(void)
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{
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uint64_t sys_counter_vct = 0, sys_counter_vct_ns = 0;
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uint64_t sys_counter_raw = 0, sys_counter_raw_ns = 0;
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uint64_t rtc_time_ns = 0;
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uint64_t delta = 0;
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rtc_time_ns = read_rtc_time_ns();
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sys_counter_vct = arch_counter_get_cntvct();
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sys_counter_raw = read_systimer_cnt_high_low();
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sys_counter_vct_ns = cyc_to_ns(sys_counter_vct);
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sys_counter_raw_ns = cyc_to_ns(sys_counter_raw);
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delta = rtc_time_ns - sys_counter_vct_ns;
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pr_debug("[systimer] rtc_time_ns=%lld\n", rtc_time_ns);
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pr_debug("[systimer] sys_counter_vct=%lld, sys_counter_vct_ns=%lld\n",
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sys_counter_vct, sys_counter_vct_ns);
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pr_debug("[systimer] sys_counter_raw=%lld, sys_counter_raw_ns=%lld\n",
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sys_counter_raw, sys_counter_raw_ns);
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pr_debug("[systimer] delta=%lld, delta_delta=%lld\n",
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delta, delta - last_delta);
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last_delta = delta;
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}
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static void minute_timer_work_func(struct work_struct *work)
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{
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/* u32 val = 0; */
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print_systimer_rtc_time();
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#if 0
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/* unlock spm register */
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writel(0x0b160001, spm_register_lock);
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/* set control mux */
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val = readl(control_mux);
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val &= ~(1 << 7);
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writel(val, control_mux);
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val = readl(systimer_base + SYSTIMER_CNTSR);
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val &= (7 << 8);
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val >>= 8;
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pr_debug("[systimer] old clock=%d\n", val);
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if (val <= 2) {
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/* select clock */
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val = readl(select_clock);
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val |= 1 << 17;
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writel(val, select_clock);
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} else {
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/* select clock */
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val = readl(select_clock);
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val &= ~(1 << 17);
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writel(val, select_clock);
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}
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val = readl(systimer_base + SYSTIMER_CNTSR);
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val &= (7 << 8);
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val >>= 8;
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pr_debug("[systimer] new clock=%d\n", val);
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#endif
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}
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static void minute_timer_timeout(unsigned long data)
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{
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schedule_work(&work_poll);
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mod_timer(&minute_timer, jiffies + TIME_CHANGE_32K_FROM_13M * HZ);
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}
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static int __init systimer_compensation_init(void)
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{
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spm_register_lock = ioremap(0x10A06000, 4);
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control_mux = ioremap(0x10A0602c, 4);
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select_clock = ioremap(0x10A06008, 4);
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systimer_base = ioremap(0x100e0000, 0x9c);
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pr_debug("[systimer] %s\n", __func__);
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INIT_WORK(&work_poll, minute_timer_work_func);
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init_timer(&minute_timer);
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minute_timer.function = minute_timer_timeout;
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rtc_dev = rtc_class_open(CONFIG_RTC_HCTOSYS_DEVICE);
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if (rtc_dev == NULL) {
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pr_info("[systimer] rtc_class_open rtc_dev fail\n");
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return -1;
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}
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mod_timer(&minute_timer, jiffies + TIME_CHANGE_32K_FROM_13M * HZ);
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return 0;
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}
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module_init(systimer_compensation_init);
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("systimer compensation driver");
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MODULE_AUTHOR("MTK");
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