threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
41 lines
1.2 KiB
C
41 lines
1.2 KiB
C
/*
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* Copyright (C) 2018 MediaTek Inc.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _H_SPI_SLAVE_H_
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#define _H_SPI_SLAVE_H_
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#include <linux/types.h>
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#define SPI_TX_LOW_SPEED_HZ (6500000)
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#define SPI_RX_LOW_SPEED_HZ (6500000)
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#define SPI_TX_MAX_SPEED_HZ (55000000)
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#define SPI_RX_MAX_SPEED_HZ (28000000)
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/*
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* Public function API for user
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*/
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extern int spislv_init(void);
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extern int spislv_switch_speed_hz(u32 tx_speed_hz, u32 rx_speed_hz);
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extern int spislv_write(u32 addr, void *val, u32 len);
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extern int spislv_read(u32 addr, void *val, u32 len);
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extern int spislv_read_register(u32 addr, u32 *val);
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/*
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* NOTE: multi threads cann't write the same addr concurrently when using belowing APIs.
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*/
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extern int spislv_write_register(u32 addr, u32 val);
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extern int spislv_write_register_mask(u32 addr, u32 val, u32 msk);
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#endif /*_H_SPI_SLAVE_H_*/
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