threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
65 lines
2.1 KiB
C
65 lines
2.1 KiB
C
/*
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* Copyright (C) 2018 MediaTek Inc.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __SMI_PORT_H__
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#define __SMI_PORT_H__
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#include <dt-bindings/memory/mt6853-larb-port.h>
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#define SMI_OSTD_MAX (0x3f)
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#define SMI_COMM_MASTER_NUM (8)
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#define SMI_LARB_NUM (21)
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#define SMI_LARB0_PORT_NUM (4) /* SYS_DIS */
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#define SMI_LARB1_PORT_NUM (5) /* SYS_DIS */
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#define SMI_LARB2_PORT_NUM (5) /* SYS_MDP */
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#define SMI_LARB3_PORT_NUM (0)
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#define SMI_LARB4_PORT_NUM (12) /* SYS_VDE */
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#define SMI_LARB5_PORT_NUM (0)
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#define SMI_LARB6_PORT_NUM (0)
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#define SMI_LARB7_PORT_NUM (13) /* SYS_VEN */
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#define SMI_LARB8_PORT_NUM (0)
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#define SMI_LARB9_PORT_NUM (29) /* SYS_IMG1 */
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#define SMI_LARB10_PORT_NUM (0) /* SYS_IMG1 */
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#define SMI_LARB11_PORT_NUM (29) /* SYS_IMG2 */
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#define SMI_LARB12_PORT_NUM (0) /* SYS_IMG2 */
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#define SMI_LARB13_PORT_NUM (12) /* SYS_CAM1 */
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#define SMI_LARB14_PORT_NUM (6) /* SYS_CAM1 */
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#define SMI_LARB15_PORT_NUM (5) /* SYS_CAM1 */
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#define SMI_LARB16_PORT_NUM (17) /* SYS_CAM2 */
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#define SMI_LARB17_PORT_NUM (17) /* SYS_CAM3 */
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#define SMI_LARB18_PORT_NUM (17) /* SYS_CAM4 */
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#define SMI_LARB19_PORT_NUM (4) /* SYS_IPE */
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#define SMI_LARB20_PORT_NUM (6) /* SYS_IPE */
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#define SMI_COMM_NUM (1 + 7)
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#define SMI_DEV_NUM ((SMI_LARB_NUM) + (SMI_COMM_NUM))
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#define SMI_LARB_CCU0 (13)
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#define SMI_LARB_CCU1 (14)
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static const bool
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SMI_COMM_BUS_SEL[SMI_COMM_MASTER_NUM] = {0, 1, 1, 0, 1, 1, 0, 1,};
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static const u32
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SMI_LARB_L1ARB[SMI_LARB_NUM] = {
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0, 1, 4, SMI_COMM_MASTER_NUM, 2, 2, SMI_COMM_MASTER_NUM,
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3, SMI_COMM_MASTER_NUM, 5, SMI_COMM_MASTER_NUM, 5, SMI_COMM_MASTER_NUM,
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7, 6, SMI_COMM_MASTER_NUM, 6, 7, 7, 5, 5};
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static const u8
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SMI_LARB_PORT_NUM[SMI_LARB_NUM] = {
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4, 5, 5, 0, 12, 0, 0, 13, 0, 29, 0, 29, 0, 12, 6, 5, 17, 17, 17, 4, 6};
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#endif
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