Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
66 lines
1.5 KiB
C
66 lines
1.5 KiB
C
/*
|
|
* Copyright (C) 2017 MediaTek Inc.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
|
|
* See http://www.gnu.org/licenses/gpl-2.0.html for more details.
|
|
*/
|
|
|
|
#ifndef __SCP_L1C_H
|
|
#define __SCP_L1C_H
|
|
|
|
#define SCP_IL1C 0
|
|
#define SCP_DL1C 1
|
|
|
|
#define L1C_BASE (scpreg.l1cctrl)
|
|
#define L1C_SEL(x) ((struct L1C_REGISTER_T *)(L1C_BASE+x*0x3000))
|
|
|
|
|
|
/* L1C_OP register definitions
|
|
*/
|
|
#define L1C_OP_EN_OFFSET (0)
|
|
#define L1C_OP_EN_MASK (1<<L1C_OP_EN_OFFSET)
|
|
#define L1C_OP_OP_OFFSET (1)
|
|
#define L1C_OP_OP_MASK (15<<L1C_OP_OP_OFFSET)
|
|
|
|
enum scp_l1c_status_t {
|
|
SCP_L1C_STATUS_OK = 0
|
|
};
|
|
|
|
/* structure type to access the L1C register
|
|
*/
|
|
struct L1C_REGISTER_T {
|
|
uint32_t L1C_CON;
|
|
uint32_t L1C_OP;
|
|
uint32_t L1C_HCNT0L;
|
|
uint32_t L1C_HCNT0U;
|
|
uint32_t L1C_CCNT0L;
|
|
uint32_t L1C_CCNT0U;
|
|
uint32_t L1C_HCNT1L;
|
|
uint32_t L1C_HCNT1U;
|
|
uint32_t L1C_CCNT1L;
|
|
uint32_t L1C_CCNT1U;
|
|
uint32_t RESERVED0[1];
|
|
uint32_t L1C_REGION_EN;
|
|
uint32_t RESERVED1[2036];/**< (0x2000-12*4)/4 */
|
|
uint32_t L1C_ENTRY_N[16];
|
|
uint32_t L1C_END_ENTRY_N[16];
|
|
};
|
|
|
|
enum L1C_line_command_t {
|
|
L1C_INVA = 1,
|
|
L1C_INVL = 2,
|
|
L1C_INVW = 4,
|
|
L1C_FLUA = 9,
|
|
L1C_FLUD = 10,
|
|
L1C_FLUS = 12
|
|
};
|
|
|
|
enum scp_l1c_status_t scp_l1c_flua(uint32_t L1C_type);
|
|
#endif
|