threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
78 lines
2.5 KiB
C
78 lines
2.5 KiB
C
/*
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* Copyright (C) 2017 MediaTek Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See http://www.gnu.org/licenses/gpl-2.0.html for more details.
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*/
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#ifndef __LINUX_RT5734_SPI_H
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#define __LINUX_RT5734_SPI_H
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#include <linux/mutex.h>
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struct rt5734_chip {
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struct spi_device *spi;
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struct device *dev;
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struct mutex io_lock;
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#ifdef CONFIG_RT_REGMAP
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struct rt_regmap_device *regmap_dev;
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#endif /* CONFIG_RT_REGMAP */
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int irq;
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};
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#define RT5734_CHIPNAME (0x01)
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/* register map */
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#define RT5734_CHIPNAME_R (0x01)
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#define RT5734_FLT_RECORDTEMP_R (0x13)
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#define RT5734_IRQ_MASK_R (0x32)
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#define RT5734_BUCK1_DCM_R (0x3E)
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#define RT5734_BUCK1_R (0x48)
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#define RT5734_BUCK1_MODE_R (0x49)
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#define RT5734_BUCK1_RSPCFG1_R (0x54)
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#define RT5734_BUCK2_DCM_R (0x5B)
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#define RT5734_BUCK2_R (0x62)
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#define RT5734_BUCK2_MODE_R (0x63)
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#define RT5734_BUCK2_RSPCFG1_R (0x6E)
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#define RT5734_BUCK3_DCM_R (0x75)
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#define RT5734_BUCK3_R (0x7C)
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#define RT5734_BUCK3_MODE_R (0x7D)
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#define RT5734_BUCK3_RSPCFG1_R (0x88)
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/* 6.Interrupt : OTP/OCP/OV */
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#define FLT_RECORDTEMP_FLT_TEMPSDR_M (0x08)
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#define FLT_RECORDTEMP_FLT_TEMPWARNR_M (0x04)
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#define FLT_RECORDTEMP_FLT_TEMPWARNF_M (0x02)
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#define FLT_RECORDTEMP_FLT_TEMPSDF_M (0x01)
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#define FLT_RECORDBUCK1_FLT_BUCK1_WOC_M (0x40)
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#define FLT_RECORDBUCK1_FLT_BUCK1_OV_M (0x20)
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#define FLT_RECORDBUCK1_FLT_BUCK1_UV_M (0x10)
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#define FLT_RECORDBUCK2_FLT_BUCK2_WOC_M (0x40)
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#define FLT_RECORDBUCK2_FLT_BUCK2_OV_M (0x20)
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#define FLT_RECORDBUCK2_FLT_BUCK2_UV_M (0x10)
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extern int rt5734_read_byte(void *client, uint32_t addr, uint32_t *val);
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extern int rt5734_write_byte(void *client, uint32_t addr, uint32_t value);
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extern int rt5734_assign_bit(void *client, uint32_t reg,
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uint32_t mask, uint32_t data);
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extern int rt5734_regulator_init(struct rt5734_chip *chip);
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extern int rt5734_regulator_deinit(struct rt5734_chip *chip);
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#define rt5734_set_bit(spi, reg, mask) \
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rt5734_assign_bit(spi, reg, mask, mask)
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#define rt5734_clr_bit(spi, reg, mask) \
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rt5734_assign_bit(spi, reg, mask, 0x00)
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#define RT5734_INFO(format, args...) pr_info(format, ##args)
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#define RT5734_pr_notice(format, args...) pr_notice(format, ##args)
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#endif /* __LINUX_RT5734_SPI_H */
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