threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
184 lines
4.7 KiB
C
184 lines
4.7 KiB
C
/*
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* Copyright (C) 2015 MediaTek Inc.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _DRV_COMM_H
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#define _DRV_COMM_H
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#include "mu3d_hal_hw.h"
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#include <linux/io.h>
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#undef EXTERN
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#ifdef _DRV_COMM_H
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#define EXTERN
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#else
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#define EXTERN \
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extern
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#endif
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/* CONSTANTS */
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#ifndef FALSE
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#define FALSE 0
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#endif
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#ifndef TRUE
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#define TRUE 1
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#endif
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/* TYPES */
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#define DEV_UINT32 unsigned int
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#define DEV_INT32 int
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#define DEV_UINT16 unsigned short
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#define DEV_INT16 short
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#define DEV_UINT8 unsigned char
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#define DEV_INT8 char
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enum USB_RESULT {
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RET_SUCCESS = 0,
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RET_FAIL,
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};
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#ifdef NEVER
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#define os_writelmsk(addr, data, msk) \
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{ os_writel(addr, ((os_readl(addr) & ~(msk)) | ((data) & (msk)))); \
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}
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#define os_setmsk(addr, msk) \
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{ os_writel(addr, os_readl(addr) | msk); \
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}
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#define os_clrmsk(addr, msk) \
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{ os_writel(addr, os_readl(addr) & ~msk); \
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}
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/*msk the data first, then umsk with the umsk.*/
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#define os_writelmskumsk(addr, data, msk, umsk) \
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{\
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os_writel(addr, ((os_readl(addr) & ~(msk)) | ((data) & (msk))) & (umsk));\
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}
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#define USB_END_OFFSET(_bEnd, _bOffset) ((0x10*(_bEnd-1)) + _bOffset)
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#define USB_ReadCsr32(_bOffset, _bEnd) os_readl(USB_END_OFFSET(_bEnd, _bOffset))
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#define USB_WriteCsr32(_bOffset, _bEnd, _bData) os_writel(USB_END_OFFSET(_bEnd, _bOffset), _bData)
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#else
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static inline void os_writeb(void __iomem *addr, unsigned char data)
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{
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writeb(data, (void __iomem *)addr);
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if (0)
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pr_debug("%s writeb [%p] = 0x%08x\n", __func__, (void *)addr, data);
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}
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static inline void os_writew(void __iomem *addr, unsigned short data)
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{
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writew(data, (void __iomem *)addr);
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if (0)
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pr_debug("%s writew [%p] = 0x%08x\n", __func__, (void *)addr, data);
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}
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static inline void os_writel(void __iomem *addr, unsigned int data)
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{
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writel(data, (void __iomem *)addr);
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if (0)
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pr_debug("%s writel [%p] = 0x%08x\n", __func__, (void *)addr, data);
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}
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#define os_readl(addr) readl((void __iomem *)((unsigned long)addr))
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static inline void os_writelmsk(void __iomem *addr, unsigned int data, unsigned int msk)
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{
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unsigned int tmp = readl((void __iomem *)addr);
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mb(); /* avoid context switch */
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writel(((tmp & ~(msk)) | ((data) & (msk))), (void __iomem *)addr);
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}
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static inline void os_setmsk(void __iomem *addr, unsigned int msk)
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{
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unsigned int tmp = readl((void __iomem *)addr);
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if (0)
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pr_debug("%s setmsk [%p] = 0x%08x\n", __func__, (void *)addr, tmp);
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mb(); /* avoid context switch */
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writel((tmp | msk), (void __iomem *)addr);
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if (0)
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pr_debug("%s setmsk [%p] = 0x%08x\n", __func__, (void *)addr,
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readl((void __iomem *)addr));
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}
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static inline void os_clrmsk(void __iomem *addr, unsigned int msk)
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{
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unsigned int tmp = readl((void __iomem *)addr);
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if (0)
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pr_debug("%s clrmsk [%p] = 0x%08x\n", __func__, (void *)addr, tmp);
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mb(); /* avoid context switch */
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writel((tmp & ~(msk)), (void __iomem *)addr);
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if (0)
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pr_debug("%s clrmsk [%p] = 0x%08x\n", __func__, (void *)addr,
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readl((void __iomem *)addr));
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}
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/*msk the data first, then umsk with the umsk.*/
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static inline void os_writelmskumsk(void __iomem *addr, unsigned int data,
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unsigned int msk, unsigned int umsk)
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{
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unsigned int tmp = readl((void __iomem *)addr);
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mb(); /* avoid context switch */
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writel(((tmp & ~(msk)) | ((data) & (msk))) & (umsk), (void __iomem *)addr);
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}
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static inline int wait_for_value(void __iomem *addr, unsigned int msk,
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unsigned int value, unsigned int ms_intvl, unsigned int count)
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{
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u32 i;
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for (i = 0; i < count; i++) {
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if ((os_readl(addr) & msk) == value)
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return RET_SUCCESS;
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mb(); /* avoid context switch */
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mdelay(ms_intvl);
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}
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return RET_FAIL;
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}
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static inline int wait_for_value_us(void __iomem *addr, unsigned int msk,
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unsigned int value, unsigned int us_intvl, unsigned int count)
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{
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u32 i;
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for (i = 0; i < count; i++) {
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if ((os_readl(addr) & msk) == value)
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return RET_SUCCESS;
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mb(); /* avoid context switch */
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udelay(us_intvl);
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}
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return RET_FAIL;
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}
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#define USB_END_OFFSET(_bEnd, _bOffset) ((0x10*(_bEnd-1)) + _bOffset)
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#define USB_ReadCsr32(_bOffset, _bEnd) \
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readl((void __iomem *)(uintptr_t)(USB_END_OFFSET(_bEnd, _bOffset)))
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#define USB_WriteCsr32(_bOffset, _bEnd, _bData) \
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do {\
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writel(_bData, (void __iomem *)(uintptr_t)(USB_END_OFFSET(_bEnd, _bOffset)));\
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mb(); /* avoid context switch */ \
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} while (0)
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#endif
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#define div_and_rnd_up(x, y) (((x) + (y) - 1) / (y))
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#endif /*_DRV_COMM_H*/
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