Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
92 lines
2.7 KiB
C
92 lines
2.7 KiB
C
/*
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* Copyright (C) 2016 MediaTek Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See http://www.gnu.org/licenses/gpl-2.0.html for more details.
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*/
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#include "AfSTMV.h"
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#include "AfDef.h"
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#define ABS_STMV(x) ((x) < 0 ? -(x) : (x))
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#define LC898211_fs 234375
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static struct stSmvPar StSmvPar;
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void StmvSet(struct stSmvPar StSetSmv)
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{
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unsigned char UcSetEnb;
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unsigned char UcSetSwt;
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unsigned short UsParSiz;
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unsigned char UcParItv;
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short SsParStt; /* StepMove Start Position */
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StSmvPar.UsSmvSiz = StSetSmv.UsSmvSiz;
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StSmvPar.UcSmvItv = StSetSmv.UcSmvItv;
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StSmvPar.UcSmvEnb = StSetSmv.UcSmvEnb;
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RegWriteA(AFSEND_211, 0x00); /* StepMove Enable Bit Clear */
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RegReadA(ENBL_211, &UcSetEnb);
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UcSetEnb &= (unsigned char)0xFD;
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RegWriteA(ENBL_211, UcSetEnb); /* Measuremenet Circuit1 Off */
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RegReadA(SWTCH_211, &UcSetSwt);
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UcSetSwt &= (unsigned char)0x7F;
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RegWriteA(SWTCH_211, UcSetSwt); /* RZ1 Switch Cut Off */
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RamReadA(RZ_211H, (unsigned short *)&SsParStt); /* Get Start Position */
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UsParSiz = StSetSmv.UsSmvSiz; /* Get StepSize */
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UcParItv = StSetSmv.UcSmvItv; /* Get StepInterval */
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RamWriteA(ms11a_211H, (unsigned short)0x0800);
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RamWriteA(MS1Z22_211H,
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(unsigned short)SsParStt); /* Set Start Position */
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RamWriteA(MS1Z12_211H, UsParSiz); /* Set StepSize */
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RegWriteA(STMINT_211, UcParItv); /* Set StepInterval */
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UcSetSwt |= (unsigned char)0x80;
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RegWriteA(SWTCH_211, UcSetSwt); /* RZ1 Switch ON */
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}
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unsigned char StmvTo(short SsSmvEnd)
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{
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unsigned short UsSmvDpl;
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short SsParStt; /* StepMove Start Position */
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/* PIOA_SetOutput(_PIO_PA29); // Monitor I/O Port */
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RamReadA(RZ_211H, (unsigned short *)&SsParStt); /* Get Start Position */
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UsSmvDpl = ABS_STMV(SsParStt - SsSmvEnd);
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if ((UsSmvDpl <= StSmvPar.UsSmvSiz) &&
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((StSmvPar.UcSmvEnb & STMSV_ON) == STMSV_ON)) {
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if (StSmvPar.UcSmvEnb & STMCHTG_ON)
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RegWriteA(MSSET_211,
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INI_MSSET_211 | (unsigned char)0x01);
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RamWriteA(MS1Z22_211H,
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SsSmvEnd); /* Handling Single Step For ES1 */
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StSmvPar.UcSmvEnb |= STMVEN_ON;
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} else {
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if (SsParStt < SsSmvEnd) { /* Check StepMove Direction */
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RamWriteA(MS1Z12_211H, StSmvPar.UsSmvSiz);
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} else if (SsParStt > SsSmvEnd) {
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RamWriteA(MS1Z12_211H, -StSmvPar.UsSmvSiz);
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}
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RamWriteA(STMVENDH_211,
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SsSmvEnd); /* Set StepMove Target Position */
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StSmvPar.UcSmvEnb |= STMVEN_ON;
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RegWriteA(STMVEN_211, StSmvPar.UcSmvEnb); /* Start StepMove */
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}
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return 0;
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}
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