threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
69 lines
2.6 KiB
C
69 lines
2.6 KiB
C
/*
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* Copyright (C) 2020 MediaTek Inc.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _MT_GPUFREQ_H_
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#define _MT_GPUFREQ_H_
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#include <linux/module.h>
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#include <linux/clk.h>
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#define BUCK_ON 1
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#define BUCK_OFF 0
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#define BUCK_ENFORCE_OFF 4
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#define DRV_Reg32(addr) readl(addr)
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#define DRV_WriteReg32(addr, val) writel(val, addr)
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#define DRV_SetReg32(addr, val) DRV_WriteReg32(addr, DRV_Reg32(addr) | (val))
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#define DRV_ClrReg32(addr, val) DRV_WriteReg32(addr, DRV_Reg32(addr) & ~(val))
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struct mt_gpufreq_power_table_info {
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unsigned int gpufreq_khz;
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unsigned int gpufreq_volt;
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unsigned int gpufreq_power;
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};
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typedef void (*gpufreq_power_limit_notify)(unsigned int); /* legacy */
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/****************************
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* MTK GPUFREQ API
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****************************/
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extern unsigned int mt_gpufreq_get_cur_freq_index(void);
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extern unsigned int mt_gpufreq_get_cur_freq(void);
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extern unsigned int mt_gpufreq_get_cur_volt(void);
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extern unsigned int mt_gpufreq_get_cur_vsram(void);
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extern unsigned int mt_gpufreq_get_dvfs_table_num(void);
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extern unsigned int mt_gpufreq_target(unsigned int idx);
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extern unsigned int mt_gpufreq_voltage_enable_set(unsigned int enable);
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extern unsigned int
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mt_gpufreq_update_volt(unsigned int pmic_volt[], unsigned int array_size);
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extern unsigned int mt_gpufreq_get_freq_by_idx(unsigned int idx);
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extern unsigned int mt_gpufreq_get_volt_by_idx(unsigned int idx);
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extern void mt_gpufreq_thermal_protect(unsigned int limited_power);
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extern void mt_gpufreq_restore_default_volt(void);
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extern void mt_gpufreq_enable_by_ptpod(void);
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extern void mt_gpufreq_disable_by_ptpod(void);
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extern unsigned int mt_gpufreq_get_max_power(void);
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extern unsigned int mt_gpufreq_get_min_power(void);
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extern unsigned int mt_gpufreq_get_thermal_limit_index(void);
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extern unsigned int mt_gpufreq_get_thermal_limit_freq(void);
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extern void mt_gpufreq_set_power_limit_by_pbm(unsigned int limited_power);
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extern unsigned int mt_gpufreq_get_leakage_mw(void);
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extern int mt_gpufreq_get_cur_ceiling_idx(void);
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extern void mt_gpufreq_enable_CG(void);
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extern void mt_gpufreq_disable_CG(void);
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extern void mt_gpufreq_enable_MTCMOS(bool bEnableHWAPM);
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extern void mt_gpufreq_disable_MTCMOS(bool bEnableHWAPM);
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extern void mt_gpufreq_set_loading(unsigned int gpu_loading); /* legacy */
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#endif /* _MT_GPUFREQ_H_ */
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