threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
94 lines
3.1 KiB
C
94 lines
3.1 KiB
C
/*
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* Copyright (C) 2016 MediaTek Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See http://www.gnu.org/licenses/gpl-2.0.html for more details.
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*/
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#ifndef __ECCCI_INTERNAL_OPTION__
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#define __ECCCI_INTERNAL_OPTION__
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/* platform info */
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#define MD_GENERATION (6297)
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#define MD_PLATFORM_INFO "6297"
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#define AP_PLATFORM_INFO "MT6833"
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#define CCCI_DRIVER_VER 0x20110118
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#define MT6297
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#define _97_REORDER_BAT_PAGE_TABLE_
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/* buffer management customization */
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#define CCCI_MTU (3584-128)
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#define CCCI_NET_MTU (1500)
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#define SKB_POOL_SIZE_4K (256)
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#define SKB_POOL_SIZE_1_5K (256)
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#define SKB_POOL_SIZE_16 (64)
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#define BM_POOL_SIZE \
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(SKB_POOL_SIZE_4K+SKB_POOL_SIZE_1_5K+SKB_POOL_SIZE_16)
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/*reload pool if pool size dropped below 1/RELOAD_TH */
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#define RELOAD_TH (3)
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/* EE dump cunstomization */
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#define CCCI_EE_SIZE_CCIF_SRAM (72) /* SRAM size we dump into smem */
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/* CCIF dump offset in MD SS debug region */
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#define CCCI_EE_OFFSET_CCIF_SRAM (1024 - CCCI_EE_SIZE_CCIF_SRAM)
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/* flag to tell WDT is triggered by EPON or not, in MD SS debug region */
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#define CCCI_EE_OFFSET_EPON_MD1 (0x2844)
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#define CCCI_EE_OFFSET_EPON_MD3 (0x464)
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/* flag to enable MD power off checking or not, in MD SS debug region */
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#define CCCI_EE_OFFSET_EPOF_MD1 (0x2840)
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#define CCCI_EE_SMEM_TOTAL_SIZE (64*1024)
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#define CCCI_SMEM_SIZE_RUNTIME_AP (0x800) /* AP runtime data size */
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#define CCCI_SMEM_SIZE_RUNTIME_MD (0x800) /* MD runtime data size */
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#define CCCI_SMEM_OFFSET_SEQERR (0x34) /* in MD CCCI debug region */
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#define CCCI_SMEM_SIZE_DBM (160)
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#define CCCI_SMEM_SIZE_DBM_GUARD (8)
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#define IPC_L4C_MSG_ID_LEN (0x40)
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/* feature option, always try using platform info first! */
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#ifdef CONFIG_MTK_TINYSYS_SCP_SUPPORT
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#define FEATURE_SCP_CCCI_SUPPORT
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#endif
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/*#define ENABLE_EMI_PROTECTION*/
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/* #define FEATURE_LOW_BATTERY_SUPPORT */
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#define ENABLE_32K_CLK_LESS
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#define HW_CHECK_SUM_ENABLE
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#define HW_FRG_FEATURE_ENABLE
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#ifdef HW_FRG_FEATURE_ENABLE
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/* #define FRG_FEATURE_TEST */
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#ifdef FRG_FEATURE_TEST
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/* 1024 + 2432 = 3456 */
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#define DPMAIF_PKT_SIZE (128*8) /* == 1024 */
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#define DPMAIF_FRG_SIZE (128*19) /* 2432 */
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#else
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/* 1664 + 1920 = 3584 (> 3* 1024)+8 */
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#define DPMAIF_PKT_SIZE (128*13) /* == 1664 */
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#define DPMAIF_FRG_SIZE (128*15) /* 1920 */
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#endif
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#else
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#define DPMAIF_PKT_SIZE (128*28) /* 3584 ==SKB_4K */
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#define DPMAIF_FRG_SIZE (128) /* =_=, no used */
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#endif
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#define _HW_REORDER_SW_WORKAROUND_
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/*#define CCCI_LOG_LEVEL 1*/
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#define FEATURE_CLK_BUF
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/*#define DPMAIF_DEBUG_LOG*/
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#define DEBUG_FOR_CCB
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#define ENABLE_CPU_AFFINITY
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#define REFINE_BAT_OFFSET_REMOVE
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#define PIT_USING_CACHE_MEM
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#define USING_TX_DONE_KERNEL_THREAD
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#define CCCI_USE_DFD_OFFSET_0
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//define CCCI_ENABLE_MPU_MEMORY_API
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#endif
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