threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
146 lines
3.4 KiB
C
146 lines
3.4 KiB
C
/*
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* Copyright (C) 2016 MediaTek Inc.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* See http://www.gnu.org/licenses/gpl-2.0.html for more details.
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*/
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#include <linux/ioctl.h>
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#ifndef __DFRC_DRV_H__
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#define __DFRC_DRV_H__
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enum DFRC_DRV_API {
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DFRC_DRV_API_UNKNOWN = -1,
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DFRC_DRV_API_GIFT,
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DFRC_DRV_API_VIDEO,
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DFRC_DRV_API_RRC_TOUCH,
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DFRC_DRV_API_RRC_VIDEO,
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DFRC_DRV_API_THERMAL,
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DFRC_DRV_API_LOADING,
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DFRC_DRV_API_WHITELIST,
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DFRC_DRV_API_MAXIMUM,
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};
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enum DFRC_DRV_FLAG {
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DFRC_DRV_FLAG_MULTI_WINDOW = 0x01,
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};
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enum DFRC_DRV_MODE {
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DFRC_DRV_MODE_DEFAULT = 0,
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DFRC_DRV_MODE_FRR,
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DFRC_DRV_MODE_ARR,
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DFRC_DRV_MODE_INTERNAL_SW,
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DFRC_DRV_MODE_MAXIMUM,
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};
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enum DFRC_DRV_SW_MODE {
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DFRC_DRV_SW_MODE_CALIBRATED_SW = 0,
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DFRC_DRV_SW_MODE_PASS_HW,
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DFRC_DRV_SW_MODE_INTERNAL_SW,
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};
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enum DFRC_DRV_HW_MODE {
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DFRC_DRV_HW_MODE_DEFAULT = 0,
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DFRC_DRV_HW_MODE_ARR,
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};
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enum DFRC_DRV_POLICY_FLAG {
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DFRC_DRV_POLICY_FLAG_NONE = 0x00,
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DFRC_DRV_POLICY_FLAG_USE_VIDEO_MODE = 0x01,
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};
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struct DFRC_DRV_POLICY {
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unsigned long long sequence;
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int api;
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int pid;
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int fps;
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int mode;
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int target_pid;
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unsigned long long gl_context_id;
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int flag;
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};
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struct DFRC_DRV_HWC_INFO {
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int single_layer;
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int num_display;
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};
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struct DFRC_DRV_INPUT_WINDOW_INFO {
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int pid;
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};
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struct DFRC_DRV_VSYNC_REQUEST {
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int fps;
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int mode;
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int sw_fps;
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int sw_mode;
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int valid_info;
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int transient_state;
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int num_policy;
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int forbid_vsync;
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};
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struct DFRC_DRC_REQUEST_SET {
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int num;
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struct DFRC_DRV_POLICY *policy;
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};
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struct DFRC_DRV_REFRESH_RANGE {
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int index;
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int min_fps;
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int max_fps;
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};
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struct DFRC_DRV_PANEL_INFO {
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int support_120;
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int support_90;
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int num;
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};
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struct DFRC_DRV_WINDOW_STATE {
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int window_flag;
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};
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struct DFRC_DRV_FOREGROUND_WINDOW_INFO {
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int pid;
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};
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#define DFRC_IOCTL_MAGIC 'd'
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#define DFRC_IOCTL_CMD_REG_POLICY \
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_IOWR(DFRC_IOCTL_MAGIC, 1000, struct DFRC_DRV_POLICY)
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#define DFRC_IOCTL_CMD_SET_POLICY \
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_IOWR(DFRC_IOCTL_MAGIC, 1001, struct DFRC_DRV_POLICY)
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#define DFRC_IOCTL_CMD_UNREG_POLICY \
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_IOWR(DFRC_IOCTL_MAGIC, 1002, unsigned long long)
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#define DFRC_IOCTL_CMD_SET_HWC_INFO \
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_IOWR(DFRC_IOCTL_MAGIC, 1003, struct DFRC_DRV_HWC_INFO)
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#define DFRC_IOCTL_CMD_SET_INPUT_WINDOW \
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_IOWR(DFRC_IOCTL_MAGIC, 1004, struct DFRC_DRV_INPUT_WINDOW_INFO)
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#define DFRC_IOCTL_CMD_RESET_STATE \
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_IO(DFRC_IOCTL_MAGIC, 1005)
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#define DFRC_IOCTL_CMD_GET_VSYNC_REQUEST \
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_IOWR(DFRC_IOCTL_MAGIC, 1006, struct DFRC_DRV_VSYNC_REQUEST)
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#define DFRC_IOCTL_CMD_GET_REQUEST_SET \
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_IOWR(DFRC_IOCTL_MAGIC, 1007, struct DFRC_DRC_REQUEST_SET)
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#define DFRC_IOCTL_CMD_GET_PANEL_INFO \
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_IOWR(DFRC_IOCTL_MAGIC, 1008, struct DFRC_DRV_PANEL_INFO)
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#define DFRC_IOCTL_CMD_GET_REFRESH_RANGE \
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_IOWR(DFRC_IOCTL_MAGIC, 1009, struct DFRC_DRV_REFRESH_RANGE)
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#define DFRC_IOCTL_CMD_SET_WINDOW_STATE \
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_IOWR(DFRC_IOCTL_MAGIC, 1010, struct DFRC_DRV_WINDOW_STATE)
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#define DFRC_IOCTL_CMD_SET_FOREGROUND_WINDOW \
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_IOWR(DFRC_IOCTL_MAGIC, 1011, struct DFRC_DRV_FOREGROUND_WINDOW_INFO)
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#define DFRC_IOCTL_CMD_FORBID_ADJUSTING_VSYNC \
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_IOWR(DFRC_IOCTL_MAGIC, 1012, int32_t)
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#endif
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