threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
149 lines
3.9 KiB
C
149 lines
3.9 KiB
C
/*
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* Copyright (C) 2015 MediaTek Inc.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _MT_TSF_H
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#define _MT_TSF_H
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#include <linux/ioctl.h>
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#ifdef CONFIG_COMPAT
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/*64 bit*/
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#include <linux/fs.h>
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#include <linux/compat.h>
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#endif
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/**
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* enforce kernel log enable
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*/
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#define KERNEL_LOG /*enable debug log flag if defined */
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#define SIG_ERESTARTSYS 512 /*ERESTARTSYS*/
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/******************************************************************************
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*
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******************************************************************************/
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#define TSF_DEV_MAJOR_NUMBER 251
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#define TSF_MAGIC 't'
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#define TSF_REG_RANGE (0x1000)
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#define TSF_BASE_HW 0x1a0a1000
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/**
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* CAM interrupt status
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*/
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/* normal siganl */
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#define TSF_INT_ST (1<<0)
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struct TSF_REG_STRUCT {
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unsigned int module;
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unsigned int Addr; /* register's addr */
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unsigned int Val; /* register's value */
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};
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struct TSF_REG_IO_STRUCT {
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struct TSF_REG_STRUCT *pData; /* pointer to TSF_REG_STRUCT */
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unsigned int Count; /* count */
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};
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/**
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* interrupt clear type
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*/
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enum TSF_IRQ_CLEAR_ENUM {
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TSF_IRQ_CLEAR_NONE, /*non-clear wait, clear after wait */
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TSF_IRQ_CLEAR_WAIT, /*clear wait, clear before and after wait */
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TSF_IRQ_WAIT_CLEAR, /*wait the signal and clear it, avoid the
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*hw executime is too s hort.
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*/
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TSF_IRQ_CLEAR_STATUS, /*clear specific status only */
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TSF_IRQ_CLEAR_ALL /*clear all status */
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};
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/**
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* module's interrupt , each module should have its own isr.
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* note:
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* mapping to isr table,ISR_TABLE when using no device tree
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*/
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enum TSF_IRQ_TYPE_ENUM {
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TSF_IRQ_TYPE_INT_TSF_ST, /* TSF */
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TSF_IRQ_TYPE_AMOUNT
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};
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struct TSF_WAIT_IRQ_STRUCT {
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enum TSF_IRQ_CLEAR_ENUM Clear;
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enum TSF_IRQ_TYPE_ENUM Type;
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unsigned int Status; /*IRQ Status */
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unsigned int Timeout;
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int UserKey; /* user key for doing interrupt operation */
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int ProcessID; /* user ProcessID (will filled in kernel) */
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unsigned int bDumpReg; /* check dump register or not */
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};
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struct TSF_CLEAR_IRQ_STRUCT {
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enum TSF_IRQ_TYPE_ENUM Type;
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int UserKey; /* user key for doing interrupt operation */
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unsigned int Status; /*Input */
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};
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/******************************************************************************
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*
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******************************************************************************/
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enum TSF_CMD_ENUM {
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TSF_CMD_RESET, /*Reset */
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TSF_CMD_DUMP_REG, /*Dump DPE Register */
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TSF_CMD_DUMP_ISR_LOG, /*Dump DPE ISR log */
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TSF_CMD_READ_REG, /*Read register from driver */
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TSF_CMD_WRITE_REG, /*Write register to driver */
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TSF_CMD_WAIT_IRQ, /*Wait IRQ */
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TSF_CMD_CLEAR_IRQ, /*Clear IRQ */
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TSF_CMD_TOTAL,
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};
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#ifdef CONFIG_COMPAT
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struct compat_TSF_REG_IO_STRUCT {
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compat_uptr_t pData;
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unsigned int Count; /* count */
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};
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#endif
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#define TSF_RESET _IO(TSF_MAGIC, TSF_CMD_RESET)
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#define TSF_DUMP_REG _IO(TSF_MAGIC, TSF_CMD_DUMP_REG)
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#define TSF_DUMP_ISR_LOG _IO(TSF_MAGIC, TSF_CMD_DUMP_ISR_LOG)
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#define TSF_READ_REGISTER \
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_IOWR(TSF_MAGIC, TSF_CMD_READ_REG, struct TSF_REG_IO_STRUCT)
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#define TSF_WRITE_REGISTER \
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_IOWR(TSF_MAGIC, TSF_CMD_WRITE_REG, struct TSF_REG_IO_STRUCT)
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#define TSF_WAIT_IRQ \
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_IOW(TSF_MAGIC, TSF_CMD_WAIT_IRQ, struct TSF_WAIT_IRQ_STRUCT)
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#define TSF_CLEAR_IRQ \
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_IOW(TSF_MAGIC, TSF_CMD_CLEAR_IRQ, struct TSF_CLEAR_IRQ_STRUCT)
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#ifdef CONFIG_COMPAT
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#define COMPAT_TSF_WRITE_REGISTER \
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_IOWR(TSF_MAGIC, TSF_CMD_WRITE_REG, struct compat_TSF_REG_IO_STRUCT)
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#define COMPAT_TSF_READ_REGISTER \
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_IOWR(TSF_MAGIC, TSF_CMD_READ_REG, struct compat_TSF_REG_IO_STRUCT)
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#endif
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/* */
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#endif
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