threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
98 lines
2.5 KiB
C
98 lines
2.5 KiB
C
/*
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* Copyright (C) 2019 MediaTek Inc.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _MT6885_VPU_REG_H_
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#define _MT6885_VPU_REG_H_
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#include <sync_write.h>
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#include "vpu_cfg.h"
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#include "vpu_cmn.h"
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/* Spare Register - Enum */
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enum {
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VPU_CMD_DO_EXIT = 0x00,
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VPU_CMD_DO_LOADER = 0x01,
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VPU_CMD_DO_D2D = 0x22,
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VPU_CMD_DO_D2D_EXT = 0x24,
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VPU_CMD_SET_DEBUG = 0x40,
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VPU_CMD_SET_FTRACE_LOG = 0x42,
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/* Extend for test */
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VPU_CMD_EXT_BUSY = 0xF0,
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VPU_CMD_DO_D2D_EXT_TEST = 0x80000024
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};
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/* host side state */
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enum {
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VPU_STATE_NOT_READY = 0x00,
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VPU_STATE_READY = 0x01,
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VPU_STATE_IDLE = 0x02,
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VPU_STATE_BUSY = 0x04,
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VPU_STATE_ERROR = 0x08,
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VPU_STATE_TERMINATED = 0x10,
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VPU_STATE_ABORT = 0xFF /* Aborted by driver */
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};
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/* device to host request */
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enum {
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VPU_REQ_NONE = 0,
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VPU_REQ_DO_CHECK_STATE = 0x100,
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VPU_REQ_DO_DUMP_LOG = 0x101,
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VPU_REQ_DO_CLOSED_FILE = 0x102,
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VPU_REQ_MAX = 0xFFFF,
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};
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/* device state, INFO17 b24..16 */
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enum {
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DS_DSP_RDY = 0x010000, /* boot-up done */
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DS_DBG_RDY = 0x020000, /* set-debug done */
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DS_ALG_RDY = 0x040000, /* do-loader done */
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DS_ALG_DONE = 0x080000, /* d2d done */
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DS_ALG_GOT = 0x100000, /* get-algo done */
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DS_PREEMPT_RDY = 0x200000, /* context switch done */
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DS_PREEMPT_DONE = 0x400000, /* d2d-ext done */
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DS_FTRACE_RDY = 0x800000, /* set-ftrace done */
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};
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static inline
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unsigned long vpu_reg_base(struct vpu_device *vd)
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{
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return (unsigned long)vd->reg.m;
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}
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static inline
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uint32_t vpu_reg_read(struct vpu_device *vd, int offset)
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{
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return ioread32((void *) (vpu_reg_base(vd) + offset));
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}
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static inline
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void vpu_reg_write(struct vpu_device *vd, int offset, uint32_t val)
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{
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iowrite32(val, (void *) (vpu_reg_base(vd) + offset));
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}
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static inline
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void vpu_reg_clr(struct vpu_device *vd, int offset, uint32_t mask)
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{
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vpu_reg_write(vd, offset, vpu_reg_read(vd, offset) & ~mask);
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}
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static inline
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void vpu_reg_set(struct vpu_device *vd, int offset, uint32_t mask)
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{
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vpu_reg_write(vd, offset, vpu_reg_read(vd, offset) | mask);
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}
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#endif
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